P5020NSE1VNB Freescale Semiconductor, P5020NSE1VNB Datasheet - Page 89

• Manufacturer Part Number: P5020NSE1VNB
• Description: Processors - Application Specialized Std Tmp Enc2000/1333
• Manufacturer: Freescale Semiconductor

Specifications of P5020NSE1VNB

• Rohs: yes

This figure shows the data and command output AC timing diagram.
This figure shows the data and command input AC timing diagram.
Freescale Semiconductor
For recommended operating conditions, see
Fall time eTSEC_1588_CLK (80%–20%)
TSEC_1588_CLK_OUT clock period
TSEC_1588_CLK_OUT duty cycle
TSEC_1588_PULSE_OUT,
TSEC_1588_ALARM_OUT
TSEC_1588_TRIG_IN pulse width
Note:
1. T
2. The maximum value of t
3. It needs to be at least two times the clock period of the clock selected by TMR_CTRL[CKSEL]. See the QorIQ Integrated
Processor Reference Manual for a description of TMR_CTRL registers.
example, for 10/100/1000 Mbps modes, the maximum value of t
Processor Reference Manual for a description of TMR_CTRL registers.
RX_CLK
TSEC_1588_TRIG_IN
TSEC_1588_ALARM_OUT
TSEC_1588_PULSE_OUT
Note: The output delay is counted starting at the rising edge if t
is the maximum clock period of eTSEC receiving clock selected by TMR_CTRL[CKSEL]. See the QorIQ Integrated
TSEC_1588_CLK_OUT
TSEC_1588_CLK
Parameter
is counted starting at the falling edge.
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
Table 44. eTSEC IEEE 1588 AC Timing Specifications (continued)
T1588CLK
Figure 21. eTSEC IEEE 1588 Output AC Timing
Figure 22. eTSEC IEEE 1588 Input AC Timing
is not only defined by the value of T
Table
t
3.
T1588CLK
t
t
t
t
T1588CLKOTH
T1588CLKOUT
T1588CLKOUT
t
T1588CLKINF
T1588TRIGH
Symbol
t
T1588OV
t
T1588CLKH
t
T1588CLKOUT
/
t
T1588OV
2 × t
t
T1588TRIGH
t
2 × t
T1588CLKOUTH
T1588CLK
T1588CLK_MAX
T1588CLK
Min
1.0
0.5
30
RX_CLK
T1588CLKOUT
be 2800, 280, and 56 ns, respectively.
, but also defined by the recovered clock. For
is non-inverting. Otherwise, it
Typ
50
—
—
—
—
Max
Electrical Characteristics
2.0
3.0
70
—
—
Unit
ns
ns
ns
ns
%
Note
—
—
—
—
2
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