C8051F564-IMR Silicon Labs, C8051F564-IMR Datasheet - Page 232

• Manufacturer Part Number: C8051F564-IMR
• Description: 8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 LIN 2.1 SPI
• Manufacturer: Silicon Labs

Specifications of C8051F564-IMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

C8051F55x/56x/57x
232
Values Read
0100 0 0 0 A slave byte was transmitted;
0101 0 X X An illegal STOP or bus error
0010 1 0 X A slave address + R/W was
0001 0 0 X A STOP was detected while
0000 1 0 X A slave byte was received;
0010 0 1 X Lost arbitration while attempt-
0001 0 1 X Lost arbitration due to a
0000 1 1 X Lost arbitration while transmit-
0 0 1 A slave byte was transmitted;
0 1 X A Slave byte was transmitted;
1 1 X Lost arbitration as master;
1 1 X Lost arbitration while attempt-
Current SMbus State
NACK received.
ACK received.
error detected.
was detected while a Slave
Transmission was in progress.
received; ACK requested.
slave address + R/W received;
ACK requested.
addressed as a Slave Trans-
mitter or Slave Receiver.
ing a STOP.
ACK requested.
ing a repeated START.
detected STOP.
ting a data byte as master.
Table 22.4. SMBus Status Decoding (Continued)
Rev. 1.1
Typical Response Options
No action required (expecting
STOP condition).
Load SMB0DAT with next data
byte to transmit.
No action required (expecting
Master to end transfer).
Clear STO.
If Write, Acknowledge received
address
If Read, Load SMB0DAT with
data byte; ACK received address
NACK received address.
If Write, Acknowledge received
address
If Read, Load SMB0DAT with
data byte; ACK received address
NACK received address.
Reschedule failed transfer;
NACK received address.
Clear STO.
No action required (transfer
complete/aborted).
Acknowledge received byte;
Read SMB0DAT.
NACK received byte.
Abort failed transfer.
Reschedule failed transfer.
Abort failed transfer.
Reschedule failed transfer.
Abort failed transfer.
Reschedule failed transfer.
Values to
Write
0 0 X 0001
0 0 X 0100
0 0 X 0001
0 0 X
0 0 1
0 0 1
0 0 0
0 0 1
0 0 1
0 0 0
1 0 0
0 0 X
0 0 0
0 0 1
0 0 0
0 0 X
1 0 X
0 0 X
1 0 X
0 0 0
1 0 0
0000
0100
0000
0100
0000
1110
1110
1110
1110
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