C8051F564-IMR Silicon Labs, C8051F564-IMR Datasheet - Page 92
C8051F564-IMR
Manufacturer Part Number
C8051F564-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F556-IMR.pdf
(302 pages)
Specifications of C8051F564-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F55x/56x/57x
11. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization is shown in
Figure 11.1
11.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051F55x/56x/57x devices implement 32 kB
or 16 kB of this program memory space as in-system, re-programmable Flash memory, organized in a con-
tiguous block from addresses 0x0000 to 0x7FFF in 32 kB devices and addresses 0x0000 to 0x3FFF in
16 kB devices. The address 0x7BFF in 32 kB devices and 0x3FFF in 16 kB devices serves as the security
lock byte for the device. Addresses above 0x7BFF are reserved in the 32 kB devices.
92
0x3FFF
0x0000
0x7BFF
0x7C00
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Programmable in 512
C8051F550/1/2/3
C8051F560/1/2/3/8/9
C8051F570/1
C8051F554/5/6/7
C8051F564/5/6/7
C8051F572/3/4/5
(FLASH)
32 kB FLASH
16 kB FLASH
Byte Sectors)
Byte Sectors)
RESERVED
(In-System
(In-System
Figure 11.1. C8051F55x/56x/57x Memory Map
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.1
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
0xFFFF
0x07FF
Registers
0x8000
0x0000
Only)
DATA MEMORY (RAM)
from 0x0000 to 0x07FF,
wrapped on 2048-byte
Same 2048 bytes as
MOVX instruction)
(accessable using
2K Bytes
boundaries
XRAM
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
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