C8051F564-IMR Silicon Labs, C8051F564-IMR Datasheet - Page 57

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C8051F564-IMR

Manufacturer Part Number
C8051F564-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F564-IMR

Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
Gain Register Definition 6.3. ADC0GNA: ADC0 Additional Selectable Gain
Indirect Address = 0x08;
Note: This register is accessed indirectly; See
Name Reserved
Reset
Bit
7:1
Type
0
Bit
GAINADD
Reserved
Name
W
7
0
Must Write 0000000b.
ADC0 Additional Gain Bit.
Setting this bit add 1/64 (0.016) gain to the gain value in the ADC0GNH and
ADC0GNL registers.
Reserved
W
6
0
Reserved
W
5
0
Section 6.3.2
Reserved
Rev. 1.1
W
4
0
for details for writing this register.
Function
Reserved
W
3
0
C8051F55x/56x/57x
Reserved
W
2
0
Reserved GAINADD
W
1
0
W
0
1
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