Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 47
Z8F011ASH020EG2156
Manufacturer Part Number
Z8F011ASH020EG2156
Description
8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F011AHJ020EG2156.pdf
(257 pages)
Specifications of Z8F011ASH020EG2156
Rohs
yes
Core
eZ8
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
1 KB
Data Ram Size
256 B
On-chip Adc
No
Package / Case
SOIC-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS025113-1212
Bit
Field
RESET
R/W
Address
Bit
[7]
POR
[6]
STOP
[5]
WDT
[4]
EXT
[3:0]
Reset or Stop Mode Recovery Event
Power-On Reset
Reset using RESET pin assertion
Reset using Watchdog Timer time-out
Reset using the On-Chip Debugger (OCTCTL[1] set to 1)
Reset from STOP Mode using DBG pin driven Low
Stop Mode Recovery using GPIO pin transition
Stop Mode Recovery using WDT time-out
Description
Power-On Reset Indicator
This bit is set to 1 if a Power-On Reset event occurs and is reset to 0, if a WDT time-out or Stop
Mode Recovery occurs. Reading this register also reset this bit to 0.
Stop Mode Recovery Indicator
This bit is set to 1 if a Stop Mode Recovery occurs. If the STOP and WDT bits are both set to 1,
the Stop Mode Recovery occurs because of a WDT time-out. If the STOP bit is 1 and the WDT
bit is 0, the Stop Mode Recovery is not caused by a WDT time-out. This bit is reset by a Power-
On Reset or a WDT time-out that occurred while not in STOP Mode. Reading this register also
resets this bit.
Watchdog Timer Time-Out Indicator
This bit is set to 1 if a WDT time-out occurs. A Power-On Reset resets this pin. A Stop Mode
Recovery from a change in an input pin also resets this bit. Reading this register resets this bit.
This read must occur before clearing the WDT interrupt.
External Reset Indicator
If this bit is set to 1, a reset initiated by the external RESET pin occurred. A Power-On Reset or
a Stop Mode Recovery from a change in an input pin resets this bit. Reading this register
resets this bit.
Reserved
These registers are reserved and must be programmed to 0000.
POR
R
7
See Table 13
STOP
R
6
Table 12. Reset Status Register (RSTSTAT)
Table 13. POR Indicator Values
WDT
R
5
EXT
R
4
0
FF0H
R
3
0
POR
1
0
0
1
1
0
0
R
Z8 Encore!
2
0
Reserved
STOP
0
0
0
0
0
1
1
Reset Register Definitions
Product Specification
R
1
0
WDT
®
0
0
1
0
0
0
1
F0830 Series
EXT
R
0
0
0
1
0
0
0
0
0
29
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