CY62148EV30LL-45ZSXI Cypress Semiconductor Corp, CY62148EV30LL-45ZSXI Datasheet - Page 5

• Manufacturer Part Number: CY62148EV30LL-45ZSXI
• Description: IC SRAM 4MBIT 45NS 32TSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY62148EV30LL-45ZSXI

• Memory Size: 4M (512K x 8)
• Package / Case: 32-TSOP II
• Format - Memory: RAM
• Memory Type: SRAM
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 45 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.2 V
• Maximum Operating Current: 20 mA
• Organization: 512 K x 8
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 3 V
• Memory Configuration: 512K X 8
• Supply Voltage Range: 2.2V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 44
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Density: 4Mb
• Access Time (max): 45ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 2.5/3.3V
• Address Bus: 19b
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Supply Current: 20mA
• Operating Supply Voltage (min): 2.2V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2076; CY62148EV30LL-45ZSXI

Capacitance
Thermal Resistance
Data Retention Characteristics
Document #: 38-05576 Rev. *K
Notes
C
C
V
I
t
t
Parameter
Parameter
CCDR
CDR
R
12. Tested initially and after any design or process changes that may affect these parameters.
13. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
14. V
15. Tested initially and after any design or process changes that may affect these parameters.
16. Full device AC operation requires linear V
DR
IN
OUT
[16]
Parameter
[15]
IH(max)


[14]
OUTPUT
JC
JA
INCLUDING
Parameters
V
= V
CE
CC
V
[12]
JIG AND
CC
CC
SCOPE
R
V
Data retention current
Chip deselect to data retention time
Operation recovery time
V
R1
R2
TH
TH
CC
+ 0.75V for pulse durations less than 20 ns.
Thermal resistance
(Junction to ambient)
Thermal resistance
(Junction to case)
Input capacitance
Output capacitance
30 pF
(For All packages)
for data retention
R1
Description
Description
Description
R2
CC
Equivalent to:
[12]
ramp from V
V
Figure 1. AC Test Loads and Waveforms
CC(min)
t
CDR
Figure 2. Data Retention Waveform
(Over the Operating Range)
2.50 V
16667
15385
OUTPUT
8000
Still air, soldered on a 3 x 4.5 inch,
two-layer printed circuit board
T
V
1.20
A
CC
DR
= 25°C, f = 1 MHz,
V
V
= V
to V
CC
IN
Rise Time = 1 V/ns
CC(min)
CC(typ)
> V
THEVENIN
= 1.5V, CE > V
Test Conditions
CC
DATA RETENTION MODE
> 100 s or stable at V
GND
– 0.2V or V
V
CC
Test Conditions
EQUIVALENT
R
Conditions
V
TH
DR
10%
CC
> 1.5V
IN
– 0.2 V,
ALL INPUT PULSES
< 0.2 V
V
CC(min)
90%
3.0 V
1554
1103
1.75
645
Ind’l/Auto-A
> 100 s.
Package
VFBGA
8.86
72
CC
V
= V
CY62148EV30 MoBL
Package
CC(min)
90%
TSOP II
CC(typ)
t
75.13
Min
R
8.95
1.5
t
10%
RC
0
Fall Time = 1 V/ns
, T
Max
10
10
A
= 25°C.
Typ
0.8
Package
[13]
SOIC
55
22
Unit



V
Max
Page 5 of 15
7
Unit
pF
pF
C/W
C/W
Unit
Unit
A
ns
ns
V
®
[+] Feedback