ST72C334J2B6 STMicroelectronics, ST72C334J2B6 Datasheet - Page 104

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ST72C334J2B6

Manufacturer Part Number
ST72C334J2B6
Description
8-bit Microcontrollers - MCU Flash 8K SPI/SCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72C334J2B6

Product Category
8-bit Microcontrollers - MCU
Core
ST7
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
8 KB
Data Ram Size
384 B
On-chip Adc
Yes
Operating Supply Voltage
3.2 V to 5.5 V
Package / Case
SDIP-42
Mounting Style
Through Hole
A/d Bit Size
8 bit
A/d Channels Available
8
Data Rom Size
256 B
Interface Type
SCI, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
4 bit
Program Memory Type
Flash
Factory Pack Quantity
13
Supply Voltage - Max
5 V
Supply Voltage - Min
3.2 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72C334J2B6
Manufacturer:
ST
Quantity:
507
ST72334J/N, ST72314J/N, ST72124J
15.2 INSTRUCTION GROUPS
The ST7 family devices use an Instruction Set
consisting of 63 instructions. The instructions may
Using a pre-byte
The instructions are described with one to four
bytes.
In order to extend the number of available op-
codes for an 8-bit CPU (256 opcodes), three differ-
ent prebyte opcodes are defined. These prebytes
modify the meaning of the instruction they pre-
cede.
The whole instruction becomes:
104/153
Load and Transfer
Stack operation
Increment/Decrement
Compare and Tests
Logical operations
Bit Operation
Conditional Bit Test and Branch
Arithmetic operations
Shift and Rotates
Unconditional Jump or Call
Conditional Branch
Interruption management
Condition Code Flag modification
PC-2 End of previous instruction
PC-1 Prebyte
PC
PC+1 Additional word (0 to 2) according to the
Opcode
number of bytes required to compute the
effective address
LD
PUSH
INC
CP
AND
BSET
BTJT
ADC
SLL
JRA
JRxx
TRAP
SIM
CLR
POP
DEC
TNZ
OR
BRES
BTJF
ADD
SRL
JRT
WFI
RIM
be subdivided into 13 main groups as illustrated in
the following table:
These prebytes enable instruction in Y as well as
indirect addressing modes to be implemented.
They precede the opcode of the instruction in X or
the instruction using direct addressing mode. The
prebytes are:
RSP
BCP
XOR
SUB
SRA
JRF
HALT
SCF
PDY 90 Replace an X based instruction using
PIX 92 Replace an instruction using direct, di-
PIY 91 Replace an instruction using X indirect
CPL
SBC
RLC
JP
IRET
RCF
immediate, direct, indexed, or inherent
addressing mode by a Y one.
rect bit, or direct relative addressing
mode to an instruction using the corre-
sponding indirect addressing mode.
It also changes an instruction using X
indexed addressing mode to an instruc-
tion using indirect X indexed addressing
mode.
indexed addressing mode by a Y one.
NEG
MUL
RRC
CALL
SWAP
CALLR
SLA
NOP
RET

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