ST72C334J2B6 STMicroelectronics, ST72C334J2B6 Datasheet - Page 72

• Manufacturer Part Number: ST72C334J2B6
• Description: 8-bit Microcontrollers - MCU Flash 8K SPI/SCI
• Manufacturer: STMicroelectronics

Specifications of ST72C334J2B6

• Product Category: 8-bit Microcontrollers - MCU
• Core: ST7
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.2 V to 5.5 V
• Package / Case: SDIP-42
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 8
• Data Rom Size: 256 B
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Program Memory Type: Flash
• Factory Pack Quantity: 13
• Supply Voltage - Max: 5 V
• Supply Voltage - Min: 3.2 V

ST72334J/N, ST72314J/N, ST72124J
14.4 SERIAL PERIPHERAL INTERFACE (SPI)
14.4.1 Introduction
The Serial Peripheral Interface (SPI) allows full-
duplex, synchronous, serial communication with
external devices. An SPI system may consist of a
master and one or more slaves or a system in
which devices may be either masters or slaves.
The SPI is normally used for communication be-
tween the microcontroller and external peripherals
or another microcontroller.
Refer to the Pin Description chapter for the device-
specific pin-out.
14.4.2 Main Features
Figure 42. Serial Peripheral Interface Master/Slave
72/153
Full duplex, three-wire synchronous transfers
Master or slave operation
Four master mode frequencies
Maximum slave mode frequency = f
Four programmable master bit rates
Programmable clock polarity and phase
End of transfer interrupt flag
Write collision flag protection
Master mode fault protection capability.
MSBit
8-BIT SHIFT REGISTER
GENERATOR
CLOCK
SPI
MASTER
LSBit
CPU
/4.
SCK
MOSI
SS
MISO
+5V
14.4.3 General description
The SPI is connected to external devices through
4 alternate pins:
A basic example of interconnections between a
single master and a single slave is illustrated on
Figure
The MOSI pins are connected together as are
MISO pins. In this way data is transferred serially
between master and slave (most significant bit
first).
When the master device transmits data to a slave
device via MOSI pin, the slave device responds by
sending data to the master device via the MISO
pin. This implies full duplex transmission with both
data out and data in synchronized with the same
clock signal (which is provided by the master de-
vice via the SCK pin).
Thus, the byte transmitted is replaced by the byte
received and eliminates the need for separate
transmit-empty and receiver-full bits. A status flag
is used to indicate that the I/O operation is com-
plete.
Four possible data/clock timing relationships may
be chosen (see
must be programmed with the same timing mode.
– MISO: Master In Slave Out pin
– MOSI: Master Out Slave In pin
– SCK: Serial Clock pin
– SS: Slave select pin
MISO
MOSI
SCK
SS
42.
Figure
8-BIT SHIFT REGISTER
MSBit
45) but master and slave
SLAVE
LSBit