VRS51C1100-40-Q-ISPV2 Cypress Semiconductor, VRS51C1100-40-Q-ISPV2 Datasheet - Page 21

• Manufacturer Part Number: VRS51C1100-40-Q-ISPV2
• Description: 8-bit Microcontrollers - MCU 128K+1K 40MHz 5V
• Manufacturer: Cypress Semiconductor

Specifications of VRS51C1100-40-Q-ISPV2

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 1 KB
• Operating Supply Voltage: 4.5 V to 5.5 V
• Package / Case: QFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 128 B
• Interface Type: UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 96
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V

Timer 2
Timer 2 of the VRS51C1100 is a 16-bit timer/counter
and is similar to timers 0 and 1 in that it can operate as
either an event counter or a timer. This is controlled by
the C/T2 bit in the T2CON special function register.
Timer 2 has three operating modes: Auto-Load,
Capture, and Baud Rate Generator. These modes are
selected via the T2CON. The following table describes
the T2CON special function register bits.
T
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ABLE
5
4
3
2
1
Bit
7
6
VRS51C1100
TF2
7
27: T
RCLK
TCLK
EXEN2
TR2
C/T2
IMER
Mnemonic
TF2
EXF2
EXF2
6
2 C
ONTROL
RCLK
5
R
EGISTER
Description
Timer 2 Overflow Flag: Set by an overflow
of Timer 2 and must be cleared by
software. TF2 will not be set when either
RCLK =1 or TCLK =1.
Timer 2 external flag change in state occurs
when either a capture or reload is caused
by a negative transition on T2EX and
EXEN2=1. When Timer 2 is enabled,
EXF=1 will cause the CPU to Vector to the
Timer 2 interrupt routine. Note that EXF2
must be cleared by software.
Serial Port Receive Clock Source.
1: Causes Serial Port to use Timer 2
overflow pulses for its receive clock in
Modes 1 and 3.
0: Causes Timer 1 overflow to be used for
the Serial Port receive clock.
Serial Port Transmit Clock.
1: Causes Serial Port to use Timer 2
overflow pulses for its transmit clock in
Modes 1 and 3.
0: Causes Timer 1 overflow to be used for
the Serial Port transmit clock.
Timer 2 External Mode Enable.
1: Allows a capture or reload to occur as a
result of a negative transition on T2EX if
Timer 2 is not being used to clock the Serial
Port.
0: Causes Timer 2 to ignore events at
T2EX.
Start/Stop Control for Timer 2.
1: Start Timer 2
0: Stop Timer 2
Timer or Counter Select (Timer 2)
1: External event counter falling edge
triggered.
0: Internal Timer (OSC/12)
TCLK
4
(T2CON) –SFR C8
EXEN2
3
H
TR2
2
C/T2
1
CP/RL2
0
The Timer 2 mode selection bits and their functions are
described in the following table:
T
The details of each mode are described in the
following sections.
Timer 2 Capture Mode
In capture mode, the EXEN2 bit of the T2CON register
controls whether an external transition on the T2EX pin
will trigger the capture of the timer value.
When EXEN2 = 0, the Timer 2 acts as a 16-bit
timer/counter, which, upon overflowing, will set the TF2
bit (Timer 2 overflow bit). This overflow can be used to
generate an interrupt.
When EXEN2 = 1, the above still applies, however, in
addition, it is possible to allow a 1 to 0 transition at the
T2EX input to cause the current value stored in the
Timer 2 registers (TL2 and TH2) to be captured into
F
ABLE
IGURE
0
RCLK + TCLK
0
0
1
X
T2EX pin
T2 pin
F
28: T
OSC
14: T
CP/RL2
IMER
IMER
2 M
EXEN2
÷12
2
C/T2
IN
ODE
C
APTURE
S
CP/RL2
0
1
X
X
ELECTION
0
1
Capture/Reload Select.
1: Capture of Timer 2 value into RCAP2H,
RCAP2L is performed if EXEN2=1 and a
negative transitions occurs on the T2EX
pin. The capture mode requires RCLK and
TCLK to be 0.
0: Auto-reload reloads will occur either with
Timer 2 overflows or negative transitions at
T2EX when EXEN2=1. When either RCK
=1 or TCLK =1, this bit is ignored and the
timer is forced to auto-reload on Timer 2
overflow.
TR2
COUNTER
M
TIMER
ODE
B
ITS
TR2
1
1
1
0
MODE
16-bit Auto-Reload Mode
16-bit Capture Mode
Baud Rate Generator
Mode
Timer 2 stops
0
0
RCAP2L
TL2
page 21 of 50
7
7
0
0
EXF2
RCAP2H
TH2
7
Interrupt
7
Timer 2
TF2