VRS51C1100-40-Q-ISPV2 Cypress Semiconductor, VRS51C1100-40-Q-ISPV2 Datasheet - Page 23

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VRS51C1100-40-Q-ISPV2

Manufacturer Part Number
VRS51C1100-40-Q-ISPV2
Description
8-bit Microcontrollers - MCU 128K+1K 40MHz 5V
Manufacturer
Cypress Semiconductor
Datasheet

Specifications of VRS51C1100-40-Q-ISPV2

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
64 KB
Data Ram Size
1 KB
Operating Supply Voltage
4.5 V to 5.5 V
Package / Case
QFP-44
Mounting Style
SMD/SMT
Data Rom Size
128 B
Interface Type
UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
36
Number Of Timers
3
Program Memory Type
Flash
Factory Pack Quantity
96
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Serial Port Control Register
The SCON (serial port control) register contains
control and status information, and includes the 9
data bit for transmit/receive (TB8/RB8 if required),
mode selection bits and serial port interrupt bits (TI
and RI).
T
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ABLE
5
4
3
2
1
0
Bit
7
6
VRS51C1100
SM0
7
29: S
SM2
REN
TB8
RB8
TI
RI
ERIAL
Mnemonic
SM0
SM1
SM1
6
P
ORT
C
SM2
ONTROL
5
Description
Bit to select mode of operation (see table
below)
Bit to select mode of operation (see table
below)
Multiprocessor communication is possible
in Modes 2 and 3.
In Modes 2 or 3 if SM2 is set to 1, RI will
not be activated if the received 9
(RB8) is 0.
In Mode 1, if SM2 = 1 then RI will not be
activated if a valid stop bit was not
received.
Serial Reception Enable Bit
This bit must be set by software and
cleared by software.
1: Serial reception enabled
0: Serial reception disabled
9
This bit must be set by software and
cleared by software.
9
In Mode 1, if SM2 = 0, RB8 is the stop bit
that was received.
In Mode 0, this bit is not used.
This bit must be cleared by software.
Transmission Interrupt flag.
Automatically set to 1 when:
This bit must be cleared by software.
Reception Interrupt flag
Automatically set to 1 when:
This bit must be cleared by software.
th
th
R
The 8
Automatically set to 1 when the stop bit
The 8
Automatically set to 1 when the stop bit
has been sent in the other modes (see
SM2 exception).
data bit transmitted in Modes 2 and 3
data bit received in modes 2 and 3.
has been sent in the other modes.
EGISTER
REN
4
th
th
bit has been received in Mode 0.
bit has been sent in Mode 0.
(SCON) – SFR 98
TB8
3
RB8
2
H
TI
1
th
data bit
RI
0
th
T
UART Operating Modes
The VRS51C1100’s serial port can operate in four
different modes. In all four modes, a transmission is
initiated by an instruction that uses the SBUF register
as a destination register. In Mode 0, reception is
initiated by setting RI to 0 and REN to 1. An incoming
start bit initiates reception in the other modes, provided
that REN is set to 1. The following paragraphs
describe these four modes.
UART Operation in Mode 0
In this mode, the serial data exits and enters through
the RXD pin. TXD is used to output the shift clock. The
signal is composed of 8 data bits starting with the LSB.
The baud rate in this mode is 1/12 the oscillator
frequency.
F
ABLE
IGURE
SM0
0
0
1
1
Write to
SBUF
REN
Fosc/12
RI
30: S
17: S
Input Function
ERIAL
SM1
0
1
0
1
ERIAL
1
RXD P3.0
D
P
S
CLK
ORT
P
Start
TX Clock
RX Clock
Start Shift
ORT
Q
M
Mode
0
1
2
3
M
ODES OF
ODE
ZERO DETECTOR
1
RX Control Unit
TX Control Unit
1
0 B
Internal Bus
Shift Register
TI
RI
1
Internal Bus
O
LOCK
SBUF
SBUF
1
PERATION
1
Description
Shift Register
8-bit UART
9-bit UART
9-bit UART
Shift
1
D
Receive
1
IAGRAM
Serial Port
Interrupt
0
Send
Shift
READ SBUF
RXD P3.0
Clock
Shift
RXD P3.0
page 23 of 50
Baud Rate
F
Variable
F
F
Variable
TXD P3.1
osc
osc
osc
/12
/64
/32
or

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