ADP5042CP-1-EVALZ Analog Devices, ADP5042CP-1-EVALZ Datasheet - Page 7

• Manufacturer Part Number: ADP5042CP-1-EVALZ
• Description: Power Management IC Development Tools Output Buck Regulator + Dual Fixed Eval
• Manufacturer: Analog Devices
• Series: ADP5042r

Specifications of ADP5042CP-1-EVALZ

• Rohs: yes
• Tool Is For Evaluation Of: ADP5042

Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
AVIN, VINx, VOUTx, ENx, MODE, MR, WDIx,
WMOD, WSTAT, nRSTO to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
ESD Human Body Model
ESD Charged Device Model
ESD Machine Model
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP5042 can be damaged when the junction temperature
limits are exceeded. Monitoring ambient temperature does not
guarantee that the junction temperature is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient
temperature may have to be derated. In applications with
moderate power dissipation and low PCB thermal resistance,
the maximum ambient temperature can exceed the maximum
limit as long as the junction temperature is within specification
limits. The junction temperature of the device is dependent on
the ambient temperature, the power dissipation of the device
(P
package. Maximum junction temperature is calculated from the
ambient temperature and power dissipation using the formula
D
), and the junction-to-ambient thermal resistance of the
T
J
= T
A
+ (P
D
× θ
JA
)
Rating
−0.3 V to +6 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
3000 V
1500 V
100 V
Rev. A | Page 7 of 32
Junction-to-ambient thermal resistance (θ
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
PCB material, layout, and environmental conditions. The specified
value of θ
as per JEDEC standard. For additional information, see the
AN-772
for the Lead Frame Chip Scale (LFCSP).
THERMAL RESISTANCE
θ
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
20-Lead, 0.5 mm pitch LFCSP
ESD CAUTION
JA
is specified for the worst-case conditions, that is, a device
Application Note, A Design and Manufacturing Guide
JA
is based on a four-layer, 4” × 3”, 2.5 oz copper board,
JA
θ
38
may vary, depending on
JA
JA
) of the package is
θ
4.2
ADP5042
JC
Unit
°C/W