IDT70T3339S133BC IDT, Integrated Device Technology Inc, IDT70T3339S133BC Datasheet - Page 6

• Manufacturer Part Number: IDT70T3339S133BC
• Description: IC SRAM 9MBIT 133MHZ 256BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT70T3339S133BC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 9M (512K x 18)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 2.4 V ~ 2.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 70T3339S133BC

NOTES:
1. "H" = V
2. ADS, CNTEN, REPEAT = X.
3. OE and ZZ are asynchronous input signals.
4. It is possible to read or write any combination of bytes during a given access. A few representative samples have been illustrated here.
Truth Table II—Address Counter Control
Truth Table I—Read/Write and Enable Control
NOTES:
1. "H" = V
2. Read and write operations are controlled by the appropriate setting of R/W, CE
3. Outputs configured in flow-through output mode: if outputs are in pipelined mode the data out will be delayed by one cycle.
4. ADS and REPEAT are independent of all other memory control signals including CE
5. The address counter advances if CNTEN = V
6. When REPEAT is asserted, the counter will reset to the last valid address loaded via ADS. This value is not set at power-up: a known location should be loaded
IDT70T3339/19/99S
High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM
Address
OE
via ADS during initialization if desired. Any subsequent ADS access during operations will update the REPEAT address location.
X
X
X
X
X
X
H
X
L
L
L
An
X
X
X
IH,
IH,
CLK
"L" = V
"L" = V
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
X
Previous
Address
Internal
An + 1
An
X
X
IL,
IL,
"X" = Don't Care.
"X" = Don't Care.
CE
X
X
H
L
L
L
L
L
L
L
L
0
Address
Internal
An + 1
An + 1
Used
An
An
CE
X
X
L
H
H
H
H
H
H
H
H
1
CLK
↑
↑
↑
↑
UB
X
X
X
H
H
L
L
H
L
L
L
IL
ADS
on the rising edge of CLK, regardless of all other memory control signals including CE
L
H
H
X
(4)
LB
X
X
H
H
H
X
L
L
L
L
L
CNTEN
X
X
L
H
(5)
R/W
X
X
X
X
X
L
L
L
H
H
H
REPEAT
L
H
H
H
(4)
ZZ
H
L
L
L
L
L
L
L
L
L
L
(6)
6.42
6
0
, CE
D
D
D
D
I/O
I/O
Upper Byte
I/O
I/O
I/O
(n+1)
(n+1)
0
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
1
I/O
(3)
(n)
D
D
, UB, LB and OE.
, CE
(n)
D
D
OUT
OUT
9-17
IN
IN
(1,2)
1
, UB and LB.
External Address Used
Counter Enabled—Internal Address generation
External Address Blocked—Counter disabled (An + 1 reused)
Counter Set to last valid ADS load
Lower Byte
Industrial and Commercial Temperature Ranges
(1,2,3,4)
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
I/O
D
D
D
D
OUT
OUT
IN
IN
0-8
Deselected–Power Down
Deselected–Power Down
Both Bytes Deselected
Write to Lower Byte Only
Write to Upper Byte Only
Write to Both Bytes
Read Lower Byte Only
Read Upper Byte Only
Read Both Bytes
Outputs Disabled
Sleep Mode
MODE
MODE
0
, CE
1
, UB and LB.
5652 tbl 03
5652 tbl 02