DSM2180F3V-15K6 STMicroelectronics, DSM2180F3V-15K6 Datasheet - Page 29

• Manufacturer Part Number: DSM2180F3V-15K6
• Description: IC FLASH 1MBIT 150NS 52PLCC
• Manufacturer: STMicroelectronics

Specifications of DSM2180F3V-15K6

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 1M (128K x 8)
• Speed: 150ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1336-5

element, or combinatorial logic. The multiplexer
selects between the sequential or combinatorial
logic outputs. The multiplexer output can drive a
port pin and has a feedback path to the AND Array
inputs.
The flip-flop in the Output Macrocell (OMC) block
can be configured as a D, T, JK, or SR type in
PSDsoft Express
and clear inputs may be driven from a product
term of the AND Array. Alternatively, CLKIN (PD1)
can be used for the clock input to the flip-flop. The
flip-flop is clocked on the rising edge of CLKIN
(PD1). The preset and clear are active High inputs.
Each clear input can use up to two product terms.
Output Macrocell Allocator. Outputs of the 16
OMCs can be routed to a combination of pins on
Port B or Port D as shown in Figure 16. The OMC
output
Table 10. Output Macrocell Port and Data Bit Assignments
Product Term Allocator. The CPLD has a Prod-
uct Term Allocator. PSDsoft Express
Product Term Allocator to borrow and place prod-
uct terms from one Macrocell to another. This hap-
pens automatically in PSDsoft Express
understanding how allocation works will help you if
your logic design does not “fit”, in which case you
may try selecting a different pin or different OMC
where the allocation resources may differ and the
Macrocell
McellAB0
McellAB1
McellAB2
McellAB3
McellAB4
McellAB5
McellAB6
McellAB7
McellBC0
McellBC1
McellBC2
McellBC3
McellBC4
McellBC5
McellBC6
McellBC7
Output
pin
is
TM
automatically
Port B0 or C0
Port B1 or C1
Port B5 or C5
. The flip-flop’s clock, preset,
Assignment
Port B or, C2
Port B3 orC3
Port B4 orC4
Port B6 orC6
Port B7 orC7
Port B0
Port B1
Port B2
Port B3
Port B4
Port B5
Port B6
Port B7
Port
determined
Native Product Terms
TM
uses the
TM
, but
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
by
choosing pin functions in PSDsoft Express
Routing can occur on a bit-by-bit basis, spitting
assignment between the Ports. However, one
OMC can be routed to one Port pin only, not both.
Figure 16. OMC Allocator
design will then fit. The following list summarizes
how product terms are allocated:
■
■
■
7
McellAB0-McellAB7 all have three native
product terms and may borrow up to six more
McellBC0-McellBC3 all have four native product
terms and may borrow up to five more
McellBC4-McellBC7 all have four native product
terms and may borrow up to six more.
OMCs (MCELLAB)
6
Maximum Borrowed
5
Product Terms
4
3 2 1 0
7
6
6
6
6
6
6
6
6
5
5
5
6
6
6
6
5
6
PORT B PINS
5
4
3
7
OMCs (MCELLBC)
2
6
1
5
Data Bit for Loading or
0
4
3 2 1 0
7
DSM2180F3V
6
Reading
PORT C PINS
5
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
4
3
2
AI04915
1
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TM
0
.