PCA85162T/Q900/1,1 NXP Semiconductors, PCA85162T/Q900/1,1 Datasheet - Page 14
![IC INTERFACE](/photos/15/63/156390/tssop-48_sml.jpg)
PCA85162T/Q900/1,1
Manufacturer Part Number
PCA85162T/Q900/1,1
Description
IC INTERFACE
Manufacturer
NXP Semiconductors
Datasheet
1.PCA85162TQ90011.pdf
(42 pages)
Specifications of PCA85162T/Q900/1,1
Package / Case
48-TSSOP
Display Type
LCD
Configuration
32 Segment
Interface
I²C
Current - Supply
80µA
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 95°C
Mounting Type
Surface Mount
Number Of Digits
16
Number Of Segments
32
Maximum Clock Frequency
4800 Hz
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 95 C
Attached Touch Screen
No
Maximum Supply Current
20 uA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Digits Or Characters
-
Lead Free Status / Rohs Status
Details
Other names
568-5119-2
NXP Semiconductors
PCA85162_1
Product data sheet
7.10 Display RAM
The display RAM is a static 32 × 4-bit RAM which stores LCD data.
There is a one-to-one correspondence between
A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element;
similarly, a logic 0 indicates the off-state.
The display RAM bit map,
backplane outputs BP0 to BP3, and the columns 0 to 31 which correspond with the
segment outputs S0 to S31. In multiplexed LCD applications the segment data of the first,
second, third, and fourth row of the display RAM are time-multiplexed with BP0, BP1,
BP2, and BP3 respectively.
When display data is transmitted to the PCA85162, the display bytes received are stored
in the display RAM in accordance with the selected LCD drive mode. The data is stored as
it arrives and does not wait for an acknowledge cycle as with the commands. Depending
on the current multiplex drive mode, data is stored singularly, in pairs, triples or
quadruples. To illustrate the filling order, an example of a 7-segment numeric display
showing all drive modes is given in
applies equally to other LCD types.
Fig 9.
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•
•
•
In static drive mode the same signal is carried by all four backplane outputs and they
can be connected in parallel for very high drive requirements.
the bits in the RAM bitmap and the LCD elements
the RAM columns and the segment outputs
the RAM rows and the backplane outputs.
display RAM rows/
backplane outputs
The display RAM bitmap shows the direct relationship between the display RAM column and the
segment outputs; and between the bits in a RAM row and the backplane outputs.
Display RAM bit map
rows
(BP)
All information provided in this document is subject to legal disclaimers.
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Rev. 01 — 19 April 2010
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Figure
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9, shows the rows 0 to 3 which correspond with the
Figure
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display RAM addresses/segment outputs (S)
4
Universal LCD driver for low multiplex rates
10; the RAM filling organization depicted
columns
27
PCA85162
28
© NXP B.V. 2010. All rights reserved.
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