PCA85162T/Q900/1,1 NXP Semiconductors, PCA85162T/Q900/1,1 Datasheet - Page 32

IC INTERFACE

PCA85162T/Q900/1,1

Manufacturer Part Number
PCA85162T/Q900/1,1
Description
IC INTERFACE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA85162T/Q900/1,1

Package / Case
48-TSSOP
Display Type
LCD
Configuration
32 Segment
Interface
I²C
Current - Supply
80µA
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 95°C
Mounting Type
Surface Mount
Number Of Digits
16
Number Of Segments
32
Maximum Clock Frequency
4800 Hz
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 95 C
Attached Touch Screen
No
Maximum Supply Current
20 uA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Digits Or Characters
-
Lead Free Status / Rohs Status
 Details
Other names
568-5119-2
NXP Semiconductors
PCA85162_1
Product data sheet
Table 19.
The PCA85162 can always be cascaded with other devices of the same type or
conditionally with other devices of the same family. This allows optimal drive selection for
a given number of pixels to display.
synchronization signals.
In a cascaded configuration only one PCA85162 master must be used as clock source. All
other PCA85162 in the cascade must be configured as slave such that they receive the
clock from the master.
If an external clock source is used, all PCA85162 in the cascade must be configured such
as to receive the clock from that external source (pin OSC connected to V
must be ensured that the clock tree is designed such that on all PCA85162 the clock
propagation delay from the clock source to all PCA85162 in the cascade is as equal as
possible since otherwise synchronization artefacts may occur.
In mixed cascading configurations, care has to be taken that the specifications of the
individual cascaded devices are met at all times.
Number of devices
2
3 to 5
6 to 10
10 to 16
SYNC contact resistance
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 19 April 2010
Figure 20
Universal LCD driver for low multiplex rates
Maximum contact resistance
6 kΩ
2.2 kΩ
1.2 kΩ
700 Ω
and
Figure 23
show the timing of the
PCA85162
© NXP B.V. 2010. All rights reserved.
DD
). Thereby it
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