SE97PW,118 NXP Semiconductors, SE97PW,118 Datasheet - Page 22

• Manufacturer Part Number: SE97PW,118
• Description: IC TEMP SENSOR DIMM 8-TSSOP
• Manufacturer: NXP Semiconductors

Specifications of SE97PW,118

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Temperature Threshold: + 165 C
• Full Temp Accuracy: 1 %
• Digital Output - Bus Interface: I2C, SMBus
• Digital Output - Number Of Bits: 11 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Description/function: Memory Module Temperature Sensor
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Current: 250 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4291-2; 935284062118; SE97PW-T

NXP Semiconductors
SE97_7
Product data sheet
Fig 21. Sequential read timing
SDA
7.10.3.3 Sequential read
START condition
S
1
slave address (memory)
0
If the master acknowledges the first data byte transmitted by the SE97, then the device
will continue transmitting as long as each data byte is acknowledged by the master
(Figure
will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with
either ‘Immediate Address Read’ or ‘Selective Read’, the only difference being the starting
byte address.
1
Fig 20. Selective read timing
0
A2 A1 A0
21). If the end of memory is reached during sequential Read, the address counter
SDA
R/W acknowledge
1
START condition
START condition
S
S
A
from slave
1
1
slave address (memory)
slave address (memory)
Rev. 07 — 29 January 2010
0
0
DDR memory module temp sensor with integrated SPD, 3.3 V
1
1
data from memory
0
0
DATA n
A2 A1 A0
A2 A1 A0
acknowledge
from master
R/W acknowledge
R/W acknowledge
0
1
A
from slave
A
from slave
A
data from memory
word address
data from memory
data from memory
DATA n + X
DATA n + 1
no acknowledge
acknowledge
no acknowledge
from master
STOP condition
from slave
acknowledge
from master
from master
STOP condition
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© NXP B.V. 2010. All rights reserved.
A
A
002aab253
A
A
P
P
SE97
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