SE97PW,118 NXP Semiconductors, SE97PW,118 Datasheet - Page 25

IC TEMP SENSOR DIMM 8-TSSOP

SE97PW,118

Manufacturer Part Number
SE97PW,118
Description
IC TEMP SENSOR DIMM 8-TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SE97PW,118

Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-40°C ~ 125°C
Output Type
I²C™/SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Temperature Threshold
+ 165 C
Full Temp Accuracy
1 %
Digital Output - Bus Interface
I2C, SMBus
Digital Output - Number Of Bits
11 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Description/function
Memory Module Temperature Sensor
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Current
250 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4291-2
935284062118
SE97PW-T
NXP Semiconductors
Table 11.
SE97_7
Product data sheet
Bit
Symbol
Default
Access
Bit
Symbol
Default
Access
Configuration register (address 01h) bit allocation
CTLB
8.3 Configuration register (01h, 16-bit read/write)
R/W
15
R
0
7
0
Table 12.
Bit
15:11 RFU
10:9
AWLB
R/W
Symbol
HEN
14
R
0
6
0
Configuration register (address 01h) bit description
Description
When enabled, hysteresis is applied to temperature movement around trigger
points. For example, consider the behavior of the ‘Above Alarm Window’ bit
(bit 14 of the Temperature register) when the hysteresis is set to 3 °C. As the
temperature rises, bit 14 will be set to ‘1’ (temperature is above the alarm
window) when the Temperature register contains a value that is greater than the
value in the Alarm Temperature Upper Boundary register. If the temperature
decreases, bit 14 will remain set until the measured temperature is less than or
equal to the value in the Alarm Temperature Upper Boundary register minus
3 °C. (Refer to
Similarly, the ‘Below Alarm Window’ bit (bit 13 of the Temperature register) will
be set to ‘0’ (temperature is equal to or above the Alarm Window Lower
Boundary Trip register) when the value in the Temperature register is equal to or
greater than the value in the Alarm Temperature Lower Boundary register. As
the temperature decreases, bit 13 will be set to ‘1’ when the value in the
Temperature register is equal to or less than the value in the Alarm Temperature
Lower Boundary register minus 3 °C. Note that hysteresis is also applied to
EVENT pin functionality.
When either of the Critical Trip or Alarm Window lock bits is set, these bits
cannot be altered until unlocked.
reserved for future use; must be ‘0’.
Hysteresis Enable.
CEVNT
RFU
00 — disable hysteresis (default)
01 — enable hysteresis at 1.5 °C
10 — enable hysteresis at 3 °C
11 — enable hysteresis at 6 °C
R/W
13
R
0
5
0
Rev. 07 — 29 January 2010
DDR memory module temp sensor with integrated SPD, 3.3 V
Figure 8
ESTAT
R/W
12
R
0
4
0
and
Table
EOCTL
R/W
11
R
0
3
0
13).
R/W
CVO
R/W
10
0
2
0
HEN
R/W
R/W
EP
9
0
1
0
© NXP B.V. 2010. All rights reserved.
SE97
SHMD
EMD
R/W
R/W
8
0
0
0
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