ADT7317ARQ-REEL Analog Devices Inc, ADT7317ARQ-REEL Datasheet - Page 20

• Manufacturer Part Number: ADT7317ARQ-REEL
• Description: IC SENSOR TEMP 10BIT DAC 16QSOP
• Manufacturer: Analog Devices Inc

Specifications of ADT7317ARQ-REEL

• Rohs Status: RoHS non-compliant
• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 120°C, External Sensor
• Output Type: I²C™, MICROWIRE™, QSPI™, SMBus™, SPI™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 120°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP

ADT7316/ADT7317/ADT7318
FUNCTIONAL DESCRIPTION—VOLTAGE OUTPUT
DIGITAL-TO-ANALOG CONVERTERS
The ADT7316/ADT7317/ADT7318 have four resistor-string
DACs fabricated on a CMOS process, with resolutions of 12,
10, and 8 bits, respectively. They contain four output buffer
amplifiers and are written to via an I
SPI serial interface. See the Serial Interface Selection section
for more information.
The ADT7316/ADT7317/ADT7318 operate from a single supply
of 2.7 V to 5.5 V, and the output buffer amplifiers provide rail-
to-rail output swing with a slew rate of 0.7 V/μs. DAC A and
DAC B share a common external reference input, namely V
REF
input, namely V
to draw virtually no current from the reference source or
unbuffered to give a reference input range from GND to V
The devices have a power-down mode in which all DACs may
be turned off completely with a high impedance output.
Each DAC output is not updated until it receives the LDAC
command. Therefore, while a new value is written to the DAC
registers, this value is not represented by a voltage output until
the DACs receive the LDAC command. Reading back from
any DAC register prior to issuing an LDAC command results in
the digital value that corresponds to the DAC output voltage.
Therefore, the digital value written to the DAC register cannot
be read back until after the LDAC command has been initiated.
This LDAC command can be given by either pulling the LDAC
pin low (falling edge loads DACs), setting up Bit D4 and Bit D5
of the DAC Configuration register (Address 0x1B), or using the
LDAC Configuration register (Address 0x1C).
When using the LDAC pin to control DAC register loading, the
low going pulse width should be 20 ns minimum. The LDAC
pin has to go high and low again before the DAC registers can
be reloaded.
REGISTER
-AB. DAC C and DAC D share a common external reference
INPUT
BUFFER
SELECT
SIGNAL
Figure 39. Single DAC Channel Architecture
REGISTER
REF
DAC
INT V
-CD. Each reference input may be buffered
REF
RESISTOR
V
STRING
REF
-AB
2
C serial interface or an
REFERENCE
BUFFER
OUTPUT BUFFER
(GAIN = 1 OR 2)
GAIN MODE
AMPLIFIER
V
OUT
DD
-A
Rev. B | Page 20 of 44
.
DIGITAL-TO-ANALOG SECTION
The architecture of a DAC channel consists of a resistor string DAC
followed by an output buffer amplifier. The voltage at the V
pin or the on-chip reference of 2.28 V provides the reference
voltage for the corresponding DAC. Figure 39 shows a block
diagram of the DAC architecture. Because the input coding to
the DAC is straight binary, the ideal output voltage is given by
where:
D = the decimal equivalent of the binary code that is loaded to
the DAC register:
N = the DAC resolution.
RESISTOR STRING
The resistor string section is shown in Figure 40. It is a string of
resistors, each approximately 603 Ω. The digital code loaded to
the DAC register determines the node on the string where the
voltage is tapped off to be fed into the output amplifier. The
voltage is tapped off by closing one of the switches connecting
the string to the amplifier. Because it is a string of resistors, it is
guaranteed monotonic.
DAC EXTERNAL REFERENCE INPUTS
There is a reference pin for each pair of DACs. The reference inputs
are buffered, but can also be individually configured as unbuffered.
The advantage with the buffered input is the high impedance it
presents to the voltage source driving it. However, if the unbuffered
mode is used, the user can have a reference voltage as low as
0.25 V and as high as V
to headroom and footroom of the reference amplifier. If there
is a buffered reference in the circuit, there is no need to use the
on-chip buffers. In unbuffered mode, the input impedance is
still large at typically 90 kΩ per reference input for 0 V to V
output mode and 45 kΩ for 0 V to 2 V
0 to 255 for ADT7318 (8 bits).
0 to 1023 for ADT7317 (10 bits).
0 to 4095 for ADT7316 (12 bits).
V
OUT
=
V
REF
2
N
×
R
R
R
R
R
D
Figure 40. Resistor String
DD
, because there is no restriction due
TO OUTPUT
AMPLIFIER
REF
output mode.
REF
REF