IDT72V51253L6BB8 IDT, Integrated Device Technology Inc, IDT72V51253L6BB8 Datasheet - Page 20

• Manufacturer Part Number: IDT72V51253L6BB8
• Description: IC FLOW CTRL MULTI QUEUE 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72V51253L6BB8

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V51253L6BB8

OUTPUT VALID FLAG OPERATION
output, OV. The OV provides an empty status or data output valid status for the
data word currently available on the output register of the read port. The rising
edge of an RCLK cycle that places new data onto the output register of the read
port, also updates the OV flag to show whether or not that new data word is
actually valid. Internally the multi-queue flow-control device monitors and
maintains a status of the empty condition of all queues within it, however only
the queue that is selected for read operations has its output valid (empty) status
output to the OV flag, giving a valid status for the word being read at that time.
data word is read from a selected queue, the OV flag will go HIGH on the next
enabled read, that is, on the next rising edge of RCLK while REN is LOW.
to show status of the new queue in line with the data output from the new queue.
When a queue selection is made the first data from that queue will appear on
the Qout data outputs 2 RCLK cycles later, the OV will change state to indicate
validity of the data from the newly selected queue on this 2
The previous cycles will continue to output data from the previous queue and
the OV flag will indicate the status of those outputs. Again, the OV flag always
indicates status for the data currently present on the output register.
based on a rising edge of RCLK. Internally the multi-queue device monitors and
keeps a record of the output valid (empty) status for all queues. It is possible that
the status of an OV flag may be changing internally even though that respective
flag is not the active queue flag (selected on the read port). A queue selected
on the write port may experience a change of its internal OV flag status based
on write operations, that is, data may be written into that queue causing it to
become “not empty”.
Valid Flag Timing for details of the timing.
EXPANSION MODE – OUTPUT VALID FLAG OPERATION
of all devices should be connected together, such that a system controller
monitoring and managing the multi-queue devices read port only looks at a
single OV flag (as opposed to a discrete OV flag for each device). This OV flag
is only pertinent to the queue being selected for read operations at that time.
Remember, that when in expansion mode only one multi-queue device can be
read from at any moment in time, thus the OV flag provides status of the active
queue on the read port.
output have a High-Impedance capability, such that when a queue selection is
made only a single device drives the OV flag bus and all other OV flag outputs
connected to the OV flag bus are placed into High-Impedance. The user does
not have to select this High-Impedance state, a given multi-queue flow-control
device will automatically place its OV flag output into High-Impedance when none
of its queues are selected for read operations.
flag output of that device will maintain control of the OV flag bus. Its OV flag will
simply update between queue switches to show the respective queue output
valid status.
on the 3 bit ID code found in the 3 most significant bits of the read queue address
bus, RDADD. If the 3 most significant bits of RDADD match the 3 bit ID code setup
on the static inputs, ID0, ID1 and ID2 then the OV flag output of the respective
device will be in a Low-Impedance state. If they do not match, then the OV flag
output of the respective device will be in a High-Impedance state. See Figure
IDT72V51233/72V51243/72V51253 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(4 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
The multi-queue flow-control device provides a single Output Valid flag
The nature of the first word fall through operation means that when the last
When queue switches are being made on the read port, the OV flag will switch
The OV flag is synchronous to the RCLK and all transitions of the OV flag occur
See Figure 12, Read Queue Select, Read Operation and Figure 13, Output
When multi-queue devices are connected in Expansion mode, the OV flags
This connection of flag outputs to create a single flag requires that the OV flag
When queues within a single device are selected for read operations, the OV
The multi-queue device places its OV flag output into High-Impedance based
nd
RCLK cycle also.
20
13, Output Valid Flag Timing for details of flag operation, including when more
than one device is connected in expansion.
ALMOST FULL FLAG
single Programmable Almost Full flag output, PAF. The PAF flag output provides
a status of the almost full condition for the active queue currently selected on the
write port for write operations. Internally the multi-queue flow-control device
monitors and maintains a status of the almost full condition of all queues within
it, however only the queue that is selected for write operations has its full status
output to the PAF flag. This dedicated flag is often referred to as the “active queue
almost full flag”. The position of the PAF flag boundary within a queue can be
at any point within that queues depth. This location can be user programmed
via the serial port or one of the default values (8 or 128) can be selected if the
user has performed default programming.
full status, when a queue is selected on the write port, this status is output via the
PAF flag. The PAF flag value for each queue is programmed during multi-queue
device programming (along with the number of queues, queue depths and
almost empty values). The PAF offset value, m, for a respective queue can be
programmed to be anywhere between ‘0’ and ‘D’, where ‘D’ is the total memory
depth for that queue. The PAF value of different queues within the same device
can be different values.
will switch to the new queue and provide the user with the new queue status,
on the second cycle after a new queue selection is made, on the same WCLK
cycle that data can actually be written to the new queue. That is, a new queue
can be selected on the write port via the WRADD bus, WADEN enable and a
rising edge of WCLK. On the second rising edge of WCLK following a queue
selection, the PAF flag output will show the full status of the newly selected queue.
The PAF is flag output is double register buffered, so when a write operation
occurs at the almost full boundary causing the selected queue status to go almost
full the PAF will go LOW 2 WCLK cycles after the write. The same is true when
a read occurs, there will be a 2 WCLK cycle delay after the read operation.
occur based on a rising edge of WCLK. Internally the multi-queue device
monitors and keeps a record of the almost full status for all queues. It is possible
that the status of a PAF flag maybe changing internally even though that flag is
not the active queue flag (selected on the write port). A queue selected on the
read port may experience a change of its internal almost full flag status based
on read operations. The multi-queue flow-control device also provides a
duplicate of the PAF flag on the PAF[3:0] flag bus, this will be discussed in detail
in a later section of the data sheet.
ALMOST EMPTY FLAG
single Programmable Almost Empty flag output, PAE. The PAE flag output
provides a status of the almost empty condition for the active queue currently
selected on the read port for read operations. Internally the multi-queue flow-
control device monitors and maintains a status of the almost empty condition of
all queues within it, however only the queue that is selected for read operations
has its empty status output to the PAE flag. This dedicated flag is often referred
to as the “active queue almost empty flag”. The position of the PAE flag boundary
As previously mentioned the multi-queue flow-control device provides a
As mentioned, every queue within a multi-queue device has its own almost
When queue switches are being made on the write port, the PAF flag output
So the PAF flag delays are:
from a write operation to PAF flag LOW is 2 WCLK + t
The delay from a read operation to PAF flag HIGH is t
Note, if t
The PAF flag is synchronous to the WCLK and all transitions of the PAF flag
See Figures 18 and 19 for Almost Full flag timing and queue switching.
As previously mentioned the multi-queue flow-control device provides a
SKEW
is violated there will be one added WCLK cycle delay.
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
SKEW2
WAF
+ WCLK + t
WAF