LFDAS12XSCT Freescale Semiconductor, LFDAS12XSCT Datasheet - Page 200

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LFDAS12XSCT

Manufacturer Part Number
LFDAS12XSCT
Description
HARDWARE MC9S12XS 48-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSCT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
S12X Debug (S12XDBGV3) Module
6.3.2.3
Read: Anytime
Write: Bits 7:6 only when S12XDBG is neither secure nor armed.
200
DBGTCR[7] is reserved. Setting this bit maps the tracing to an unimplemented bus, thus
Address: 0x0022
TSOURCE
TRCMOD
TRANGE
TALIGN
Reset
Field
5–4
3–2
1–0
6
W
R
Bits 5:0 anytime the module is disarmed.
reserved
Trace Source Control Bits — The TSOURCE enables the tracing session. If the MCU system is secured, this
bit cannot be set and tracing is inhibited.
0 No tracing selected
1 Tracing selected
Trace Range Bits — The TRANGE bits allow filtering of trace information from a selected address range when
tracing from the CPU12X in Detail Mode. To use a comparator for range filtering, the corresponding COMPE
bits must remain cleared. If the COMPE bit is not clear then the comparator will also be used to generate state
sequence triggers. See
Trace Mode Bits — See
information is stored. In Loop1 Mode, change of flow information is stored but redundant entries into trace
memory are inhibited. In Detail Mode, address and data for all memory and register accesses is stored. See
Table
Trigger Align Bits — These bits control whether the trigger is aligned to the beginning, end or the middle of a
tracing session. See
Debug Trace Control Register (DBGTCR)
0
7
6-10.
TSOURCE
Table 6-7. SSF[2:0] — State Sequence Flag Bit Encoding
0
6
Figure 6-5. Debug Trace Control Register (DBGTCR)
101,110,111
Table
SSF[2:0]
Table
000
001
010
011
100
Section 6.4.5.2
S12XS Family Reference Manual, Rev. 1.11
Table 6-8. DBGTCR Field Descriptions
6-11.
preventing proper operation.
6-9.
0
5
TRANGE
WARNING
for detailed Trace Mode descriptions. In Normal Mode, change of flow
0
4
Description
State0 (disarmed)
Current State
Final State
Reserved
State1
State2
State3
0
3
TRCMOD
0
2
Freescale Semiconductor
0
1
TALIGN
0
0

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