LFDAS12XSCT Freescale Semiconductor, LFDAS12XSCT Datasheet - Page 256

• Manufacturer Part Number: LFDAS12XSCT
• Description: HARDWARE MC9S12XS 48-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSCT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

S12XE Clocks and Reset Generator (S12XECRGV1)
The Sequence for clock quality check is shown in
1.
256
A Clock Monitor Reset will always set the SCME bit to logical’1’.
POR
LVR
Remember that in parallel to additional actions caused by Self Clock Mode
or Clock Monitor Reset
check the OSCCLK signal.
The Clock Quality Checker enables the IPLL and the voltage regulator
(VREG) anytime a clock check has to be performed. An ongoing clock
quality check could also cause a running IPLL (f
during Pseudo Stop Mode.
CHECK WINDOW
CLOCK OK
OSC OK
ACTIVE?
NUM = 50
SCM
?
YES
NO
FSTWKP=1
SCME=1 &
NO
?
EXIT FULL STOP
NO
YES
Figure 8-18. Sequence for Clock Quality Check
CM FAIL
S12XS Family Reference Manual, Rev. 1.11
YES
1
SWITCH TO OSCCLK
handling the clock quality checker continues to
NUM = NUM-1
NUM = 0
EXIT SCM
NUM > 0
?
YES
NOTE
NOTE
Figure
NO
8-18.
CLOCK MONITOR RESET
ENTER SCM
ENTER SCM
YES
SCM
) and an active VREG
SCME = 1
ACTIVE?
SCM
?
NO
YES
FSTWKP = 0
NO
YES
?
Freescale Semiconductor
NO
NUM = 0