LFDAS12XSFT Freescale Semiconductor, LFDAS12XSFT Datasheet - Page 239

• Manufacturer Part Number: LFDAS12XSFT
• Description: HARDWARE MC9S12XS 80-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSFT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

8.3.2
This section describes in address order all the S12XECRG registers and their individual bits.
8.3.2.1
The SYNR register controls the multiplication factor of the IPLL and selects the VCO frequency range.
Read: Anytime
Write: Anytime except if PLLSEL = 1
The VCOFRQ[1:0] bit are used to configure the VCO gain for optimal stability and lock time. For correct
IPLL operation the VCOFRQ[1:0] bits have to be selected according to the actual target VCOCLK
frequency as shown in
(no locking and/or insufficient stability).
Freescale Semiconductor
Module Base + 0x0000
Reset
W
R
f VCO
f PLL
f BUS
Register Descriptions
=
=
S12XECRG Synthesizer Register (SYNR)
=
0
7
VCOFRQ[1:0]
Write to this register initializes the lock detector bit.
f
Clock) must not exceed the specified maximum. If POSTDIV = $00 then
f
----------------------------------- -
2 POSTDIV
f PLL
------------ -
VCO
PLL
2 f OSC
×
2
×
f VCO
is same as f
must be within the specified VCO frequency lock range. F.
Table
×
0
6
(
------------------------------------ -
(
Figure 8-3. S12XECRG Synthesizer Register (SYNR)
SYNDIV
REFDIV
8-2. Setting the VCOFRQ[1:0] bits wrong can result in a non functional IPLL
VCO
Table 8-2. VCO Clock Frequency Selection
VCOCLK Frequency Ranges
80MHz < f
32MHz <= f
S12XS Family Reference Manual Rev. 1.11
48MHz < f
+
+
(divide by one).
1
1
0
5
)
)
Reserved
VCO
VCO
VCO
<= 80MHz
<= 120MHz
<= 48MHz
NOTE
NOTE
0
4
0
3
VCOFRQ[1:0]
SYNDIV[5:0]
S12XE Clocks and Reset Generator (S12XECRGV1)
00
01
10
11
0
2
BUS
(Bus
0
1
0
0
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