LFDAS12XSFT Freescale Semiconductor, LFDAS12XSFT Datasheet - Page 59

no-image

LFDAS12XSFT

Manufacturer Part Number
LFDAS12XSFT
Description
HARDWARE MC9S12XS 80-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSFT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
Chapter 2
Port Integration Module (S12XSPIMV1)
Revision History
2.1
2.1.1
The S12XS family Port Integration Module establishes the interface between the peripheral modules and
the I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and
multiplexing on shared pins.
This document covers:
Most I/O pins can be configured by register bits to select data direction and drive strength, to enable and
select pull-up or pull-down devices.
Freescale Semiconductor
Revision
Number
V01.04
V01.05
V01.06
Port A, B and K used as general purpose I/O
Port E associated with the IRQ, XIRQ interrupt inputs
Port T associated with 1 timer module
Port S associated with 2 SCI module and 1 SPI module
Port M associated with 1 MSCAN
Port P connected to the PWM - inputs can be used as an external interrupt source
Port H and J used as general purpose I/O - inputs can be used as an external interrupt source
Port AD associated with one 16-channel ATD module
Introduction
Revision Date
Overview
18 Dec 2009
31 Mar 2009
02 Apr 2008
Table 2-1./2-61
Sections
Affected
S12XS Family Reference Manual, Rev. 1.11
• Corrected reduced drive strength to 1/5
• Separated PE1,0 bit descriptions from other PE GPIO
• Corrected PERJ bit description
• Orthographical corrections
• Corrected PP0, PM0 pin descriptions
• Added function independency to wired-or bit descriptions
• Minor corrections
Description of Changes
59

Related parts for LFDAS12XSFT