DC-VIDEO-TVP5146N Altera, DC-VIDEO-TVP5146N Datasheet - Page 122

VIDEO DAUGHTER CARD

DC-VIDEO-TVP5146N

Manufacturer Part Number
DC-VIDEO-TVP5146N
Description
VIDEO DAUGHTER CARD
Manufacturer
Altera
Series
Stratix® IIIr

Specifications of DC-VIDEO-TVP5146N

Main Purpose
Video, Daughter Card
Embedded
No
Utilized Ic / Part
Altera Dev Kits
Primary Attributes
Dual Composite Video Input - NTSC or PAL
Secondary Attributes
10-bit BT.656 Output, Compatible with Expansion Connector, Standard on Most Altera Development Kits
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1704
1–122
Table 1–72. EP3SL150 Row Pins Input Timing Parameters (Part 1 of 3)
Stratix III Device Handbook, Volume 2
3.3-V LVTTL
3.3-V
LVCMOS
3.0-V LVTTL
3.0-V
LVCMOS
2.5 V
1.8 V
1.5 V
1.2 V
Standard
I/O
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
Clock
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
Table 1–72
standards.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
su
su
su
su
su
su
su
su
su
su
su
su
su
su
h
h
h
h
h
h
h
h
h
h
h
h
h
h
h
h
Industrial
-0.925
-0.737
-0.925
-0.737
-0.931
-0.731
-0.931
-0.731
-0.919
-0.743
-0.949
-0.712
-0.939
-0.722
-0.879
-0.782
1.040
0.988
1.040
0.988
1.046
0.982
1.046
0.982
1.034
0.994
1.065
0.964
1.055
0.974
0.995
1.034
Fast Model
lists the EP3SL150 row pins input timing parameters for single-ended I/O
Commercial
-0.964
-0.741
-0.964
-0.741
-0.975
-0.730
-0.975
-0.730
-0.968
-0.737
-1.000
-0.698
-0.989
-0.709
-0.936
-0.762
1.094
1.009
1.094
1.009
1.105
0.998
1.105
0.998
1.098
1.005
1.131
0.966
1.120
0.977
1.067
1.030
-1.360 -1.470 -1.682 -1.633 -1.954 -1.480 -1.679 -1.634 -1.993
-1.241 -1.407 -1.471 -1.383 -1.314 -1.407 -1.482 -1.393 -1.363
-1.360 -1.470 -1.682 -1.633 -1.954 -1.480 -1.679 -1.634 -1.993
-1.241 -1.407 -1.471 -1.383 -1.314 -1.407 -1.482 -1.393 -1.363
-1.357 -1.471 -1.685 -1.636 -1.957 -1.479 -1.684 -1.639 -1.998
-1.244 -1.406 -1.468 -1.380 -1.311 -1.408 -1.477 -1.388 -1.358
-1.357 -1.471 -1.685 -1.636 -1.957 -1.479 -1.684 -1.639 -1.998
-1.244 -1.406 -1.468 -1.380 -1.311 -1.408 -1.477 -1.388 -1.358
-1.366 -1.484 -1.700 -1.651 -1.972 -1.488 -1.694 -1.649 -2.008
-1.235 -1.393 -1.453 -1.365 -1.296 -1.399 -1.467 -1.378 -1.348
-1.406 -1.530 -1.590 -1.662 -1.875 -1.521 -1.582 -1.663 -1.913
-1.190 -1.356 -1.455 -1.362 -1.298 -1.366 -1.466 -1.372 -1.347
-1.382 -1.498 -1.522 -1.594 -1.807 -1.490 -1.517 -1.598 -1.848
-1.214 -1.388 -1.523 -1.430 -1.366 -1.397 -1.531 -1.437 -1.412
-1.303 -1.397 -1.363 -1.435 -1.648 -1.394 -1.362 -1.443 -1.693
-1.293 -1.489 -1.682 -1.589 -1.525 -1.493 -1.686 -1.592 -1.567
1.544
1.642
1.544
1.642
1.541
1.645
1.541
1.645
1.550
1.636
1.590
1.589
1.566
1.613
1.487
1.692
1.1 V
V
C2
CCL
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
=
1.677
1.858
1.677
1.858
1.678
1.857
1.678
1.857
1.691
1.844
1.738
1.806
1.706
1.838
1.605
1.939
1.1 V
V
C3
CCL
=
1.910
1.971
1.910
1.971
1.913
1.968
1.913
1.968
1.928
1.953
1.824
1.955
1.756
2.023
1.597
2.182
1.1 V
V
C4
CCL
=
1.851
1.855
1.851
1.855
1.854
1.852
1.854
1.852
1.869
1.837
1.880
1.835
1.812
1.903
1.653
2.062
1.1 V
V
CCL
=
C4L
2.173
1.796
2.173
1.796
2.176
1.793
2.176
1.793
2.191
1.778
2.098
1.780
2.030
1.848
1.871
2.007
0.9 V
V
CCL
=
© July 2010 Altera Corporation
1.698
1.865
1.698
1.865
1.697
1.866
1.697
1.866
1.706
1.857
1.739
1.824
1.708
1.855
1.612
1.951
1.1 V
V
CCL
I3
=
1.917
1.993
1.917
1.993
1.922
1.988
1.922
1.988
1.932
1.978
1.826
1.977
1.761
2.042
1.606
2.197
1.1 V
V
I4
CCL
=
I/O Timing
1.860
1.875
1.860
1.875
1.865
1.870
1.865
1.870
1.875
1.860
1.889
1.854
1.824
1.919
1.669
2.074
1.1 V
V
CCL
=
I4L
2.212
1.848
2.212
1.848
2.217
1.843
2.217
1.843
2.227
1.833
2.137
1.832
2.072
1.897
1.917
2.052
0.9 V
V
CCL
=
Units
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