DP83848K-MAU-EK National Semiconductor, DP83848K-MAU-EK Datasheet - Page 34

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DP83848K-MAU-EK

Manufacturer Part Number
DP83848K-MAU-EK
Description
BOARD EVALUATION DP83848K
Manufacturer
National Semiconductor
Datasheets

Specifications of DP83848K-MAU-EK

Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83848K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Not Compliant
www.national.com
1. This limit is provided as a guideline for component selection and not guaranteed by production testing. Refer to
AN-1548, “PHYTER 100 Base-TX Reference Clock Jitter Tolerance,” for details on jitter performance.
Load Capacitance
Rise / Fall Time
Parameter
Parameter
Frequency
Frequency
Frequency
Frequency
Frequency
Frequency
Symmetry
Tolerance
Tolerance
Stability
Stability
Jitter
Jitter
40%
Min
Min
25
Table 8. 50 MHz Oscillator Specification
Table 9. 25 MHz Crystal Specification
Typ
Typ
25
25
34
Max
+50
+50
800
800
Max
60%
+50
+50
40
6
1
1
Units
MHz
ppm
ppm
Units
MHz
nsec
psec
psec
ppm
ppm
pF
Temperature
1 year aging
Temperature
1 year aging
Operational
Operational
20% - 80%
Condition
Duty Cycle
Condition
Short term
Long term

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