DP83848K-MAU-EK National Semiconductor, DP83848K-MAU-EK Datasheet - Page 66

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DP83848K-MAU-EK

Manufacturer Part Number
DP83848K-MAU-EK
Description
BOARD EVALUATION DP83848K
Manufacturer
National Semiconductor
Datasheets

Specifications of DP83848K-MAU-EK

Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83848K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Not Compliant
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8.2.8 100BASE-TX Transmit Timing (t
Note: Normal Mismatch is the difference between the maximum and minimum of all rise and fall times
Note: Rise and fall times taken at 10% and 90% of the +1 or -1 amplitude
T2.8.1
T2.8.2
Parameter
PMD Output Pair
PMD Output Pair
eye pattern
100 Mb/s PMD Output Pair t
and t
100 Mb/s t
100 Mb/s PMD Output Pair
Transmit Jitter
T2.8.2
F
Description
R
and t
F
Mismatch
+1 rise
R/F
R
& Jitter)
T2.8.1
+1 fall
T2.8.2
66
Notes
T2.8.1
90%
10%
-1 fall
10%
90%
T2.8.1
Min
3
Typ
4
T2.8.1
Max
500
1.4
5
-1 rise
Units
ns
ps
ns

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