DP83848K-MAU-EK National Semiconductor, DP83848K-MAU-EK Datasheet - Page 61

• Manufacturer Part Number: DP83848K-MAU-EK
• Description: BOARD EVALUATION DP83848K
• Manufacturer: National Semiconductor

Specifications of DP83848K-MAU-EK

• Main Purpose: Interface, Ethernet
• Utilized Ic / Part: DP83848K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Not Compliant

8.2 AC SPECS
8.2.1 Power Up Timing
Note: In RMII Mode, the minimum Post Power up Stabilization and Hardware Configuration Latch-in times are 84 ms.
T2.1.1
T2.1.2
T2.1.3
Dual Function Pins
Become Enabled As Outputs
Parameter
Latch-In of Hardware
Configuration Pins
RESET_N
Hardware
X1 clock
Post Power Up Stabilization
time prior to MDC preamble for
register accesses
Hardware Configuration Latch-
in Time from power up
Hardware Configuration pins
transition to output drivers
MDC
Vcc
Description
MDIO is pulled high for 32-bit serial man-
agement initialization
X1 Clock must be stable for a min. of
167ms at power up.
Hardware Configuration Pins are de-
scribed in the Pin Description section
X1 Clock must be stable for a min. of
167ms at power up.
T2.1.2
T2.1.1
61
Notes
input
T2.1.3
output
Min
167
167
32 clocks
Typ
50
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Max
Units
ms
ms
ns