DP83848K-MAU-EK National Semiconductor, DP83848K-MAU-EK Datasheet - Page 65

• Manufacturer Part Number: DP83848K-MAU-EK
• Description: BOARD EVALUATION DP83848K
• Manufacturer: National Semiconductor

Specifications of DP83848K-MAU-EK

• Main Purpose: Interface, Ethernet
• Utilized Ic / Part: DP83848K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Not Compliant

8.2.7 100BASE-TX Transmit Packet Deassertion Timing
Note: Deassertion is determined by measuring the time from the first rising edge of TX_CLK occurring after the deasser-
tion of TX_EN to the first bit of the “T” code group as output from the PMD Output Pair. 1 bit time = 10 ns in 100 Mb/s mode.
T2.7.1
Parameter
PMD Output Pair
TX_CLK to PMD Output Pair
Deassertion
TX_CLK
TX_EN
TXD
Description
DATA
DATA
100 Mb/s Normal mode
T2.7.1
65
Notes
(T/R)
(T/R)
IDLE
IDLE
Min
Typ
6
Max
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Units
bits