OM13000 NXP Semiconductors, OM13000 Datasheet - Page 5
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OM13000
Manufacturer Part Number
OM13000
Description
BOARD LPCXPRESSO LPC1768
Manufacturer
NXP Semiconductors
Type
MCUr
Series
LPCXpressor
Specifications of OM13000
Contents
Board
Svhc
No SVHC (18-Jun-2010)
Mcu Supported Families
LPC1768
Silicon Family Name
LPC17xx
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Ic Product Type
Debugger
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
LPC1768
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5101
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
OM13000
Manufacturer:
HARRIS
Quantity:
120
Company:
Part Number:
OM13000Ј¬598
Manufacturer:
NXP
Quantity:
27
NXP Semiconductors
3. Functional problems detail
ES_LPC176X
Errata sheet
3.1 RTC.1: The Real Time Clock (RTC) does not work reliably within the
3.2 I2S.1: The XY divider (8-bit Fractional Rate Divider) will not work for
temperature specification
Introduction:
The RTC is a set of counters for measuring time when system power is on, and optionally
when it is off. The RTC is clocked by a separate 32 kHz oscillator that produces a 1 Hz
internal time reference. The RTC is powered by its own power supply pin, VBAT, which
can be connected to a battery, externally tied to a 3 V supply, or left floating. The RTC can
operate over temperature range from 40 C to 85 C.
Problem:
The RTC does not work reliably within the temperature specification.
Work-around:
None.
PCLK_I2S (Peripheral clock for I2S) higher than 74 MHz
(LPC1769/68/67/66/65/63 only)
Introduction:
The transmitter/receiver MCLK (Master clock output) rate is generated using a fractional
rate generator, dividing down the frequency of PCLK_I2S. Values of the numerator (X)
and the denominator (Y) must be chosen to produce a frequency twice that desired for the
receiver MCLK, which must be an integer multiple of the receiver bit clock rate.
Problem:
The XY divider (8-bit Fractional Rate Divider) will not work for PCLK_I2S (Peripheral clock
for I2S) higher than 74 MHz.
Work-around:
Do not use PCLK_I2S signal higher than 74 MHz.
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 22 March 2011
Errata sheet LPC1769/68/67/66/65/64/63
ES_LPC176x
© NXP B.V. 2011. All rights reserved.
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