C8051F350DK Silicon Laboratories Inc, C8051F350DK Datasheet - Page 136

• Manufacturer Part Number: C8051F350DK
• Description: DEV KIT FOR F350/351/352/353
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F350DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F35x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F350
• Silicon Family Name: C8051F35x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F350, 351, 352, 353
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1083

C8051F350/1/2/3
17.4. System Clock Selection
The internal oscillator requires little start-up time and may be selected as the system clock immediately fol-
lowing the OSCICN write that enables the internal oscillator. External crystals and ceramic resonators typ-
ically require a start-up time before they are settled and ready for use. The Crystal Valid Flag (XTLVLD in
register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To avoid reading a
false XTLVLD, in crystal mode software should delay at least 1 ms between enabling the external
oscillator and checking XTLVLD. RC and C modes typically require no startup time.
The CLKSL[1:0] bits in register CLKSEL select which oscillator source is used as the system clock.
CLKSL[1:0] must be set to 01b for the system clock to run from the external oscillator; however the exter-
nal oscillator may still clock certain peripherals (timers, PCA) when the internal oscillator is selected as the
system clock. The system clock may be switched on-the-fly between the internal oscillator, external oscilla-
tor, and Clock Multiplier so long as the selected clock source is enabled and has settled.
Table 17.1. Oscillator Electrical Characteristics
–40 to +85 °C unless otherwise specified.
136
Internal Oscillator Frequency
Internal Oscillator Supply
Current (from V
Bits7–2: Unused. Read = 000000b; Write = don’t care.
Bits1–0: CLKSL1–0: System Clock Select
Bit7
—
R
Parameter
These bits select the system clock source.
DD
Bit6
—
R
)
CLKSL
00
01
10
11
SFR Definition 17.5. CLKSEL: Clock Select
Bit5
—
R
Bit4
—
R
Internal Oscillator (as determined by the
Reset Frequency
OSCICN.7 = 1
Conditions
IFCN bits in register OSCICN)
Rev. 1.1
Bit3
—
External Oscillator
R
Selected Clock
Clock Multiplier
RESERVED
Bit2
—
R
Min
24
—
R/W
Bit1
CLKSL
24.5
Typ
450
SFR Address:
R/W
Bit0
Max
25
—
0xA9
00000000
Reset Value
Units
MHz
µA