AT91CAP9A-STK Atmel, AT91CAP9A-STK Datasheet - Page 21

• Manufacturer Part Number: AT91CAP9A-STK
• Description: KIT STARTER FOR AT91CAP9A
• Manufacturer: Atmel
• Series: CAP™r
• Type: MCUr

Specifications of AT91CAP9A-STK

• Contents: Board, CD
• For Use With/related Products: AT91CAP9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6351B–CAP–27-Jun-08
Requirements
2.4.1.2.2 MPIO Bus Characteristics
2.4.1.2.3 FPGA Power Supplies
2-14
The FPGA is connected to the AT91CAP9 microcontroller through the two MPIO buses:
Table 2-16. FPGA Bank Power Supplies
Power for VDDMPIO, VCCIO4, VCCIO6, VCCIO7, and VCCIO8 can be supplied either by 3V3 or 1V8
(1V8_CAP9) power supplies.
Choice is made by 0Ω resistor as shown below (VCCIO7 example):
Each of the six FPGA PLL blocks have two power supply pins: VCCA_PPLw and VCCD_PPLx (x = from
to 6).
Table 2-17. FPGA PLL Block Power Supply
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
Bank 8
Bank 9
Bank 10
PLL Supply Pin Name
VCCA_PPL1
VCCA_PPL2
VCCA_PPL3
VCCA_PPL4
VCCA_PPL5
First MPIO bus: MPIOA[0:31], connected to FPGA bank 1
Second MPIO bus: MPIOB[0:44], connected to FPGA banks 2 and 5
Bus frequency: 100MHz
Dedicated MPIO bus clock: MPIOB24
3V3
1V8
(See “F10: Power Supplies and Low-power Mode” on page
R183
0R
R181
0R
NC
VDDMPIO (default 1V8_FPGA)
VDDMPIO (default 1V8_FPGA)
3V3
VCCIO4 (default 3V3)
VDDMPIO (default 1V8_FPGA)
VCCIO6 (default 1V8_FPGA)
VCCIO7 (default 3V3)
VCCIO8 (default 3V3)
3V3
3V3
C271
100nF
AB3
Power Supply
VCC_PLL12
VCC_PLL12
VCC_PLL34
VCC_PLL34
VCC_PLL56
C256
10nF
AB11
AT91CAP9-STK Starter Kit User Guide
C257
10nF
VCCIO7
2-22.)