AT91CAP9A-STK Atmel, AT91CAP9A-STK Datasheet - Page 38

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AT91CAP9A-STK

Manufacturer Part Number
AT91CAP9A-STK
Description
KIT STARTER FOR AT91CAP9A
Manufacturer
Atmel
Series
CAP™r
Type
MCUr
Datasheets

Specifications of AT91CAP9A-STK

Contents
Board, CD
For Use With/related Products
AT91CAP9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6351B–CAP–27-Jun-08
Board Strap and Switch Configuration
Table 3-1. Connectors 1x2 (Continued)
Note:
3.2
Table 3-2. Connectors 1x3
3-2
Name
Name
J16
J17
J28
J31
J52
J53
J54
J55
J59
J60
J61
J62
J63
J64
J44
J48
J49
J50
J58
J66
J67
1. J6 connector is not mounted on the prototype.
Connectors 1x3
Position
(default)
(default)
Position
1-2
2-3
1-2
1-2
1-2
1-2
1-2
1-2
1-2
2-3
2-3
2-3
2-3
2-3
1-2
1-2
1-2
1-2
1-2
1-2
1-2
POR (manually or AT73C224) resets the CAP9
POR (manually or AT73C224) resets the FPGA
VDDBU supply by 1V2_SAVE
BMS pull-up to 3V3
Analog input 1 on CAP9 ADC channel 4
Analog input 2 on CAP9 ADC channel 5
Analog input 3 on CAP9 ADC channel 6
Analog input 4 on CAP9 ADC channel 7
TDO ICE port signal is CAP9 TDO signal (with J60 on 2-3). FPGA TDI signal is CAP9 TDO signal (with J64 on 1-2).
TDO ICE port signal is FPGA TDO signal (with J63 on 1-2). TDO ICE port signal is CAP9 TDO signal (with J59 on 1-2).
FPGA TMS JTAG signal is ICE port TMS signal.
FPGA TCK JTAG signal is ICE port TCK signal.
TDO ICE port signal is FPGA TDO signal (with J60 on 1-2). FPGA JTAG port TDO signal is FPGA JTAG TDO signal.
FPGA TDI JTAG signal is CAP9 TDO signal (with J59 on
2-3).
Chip select SPI DATA FLASH (U17) by CAP9
TP24 = VO3_PMC1 of AT73C224 (U4)
TP26 = VO4_PMC1 of AT73C224 (U4)
TP28 = VO3_PMC2 of AT73C224 (U5)
1V2_FPGA is connected
Flash NAND CE# signal is driven by FN_CE# CAP9 signal Flash NAND CE# signal is pull-up to 1V8
1V2_FPGA is connected
Closed
1-2
Descriptions
Descriptions
Reset sthe CAP9 during the programming of FPGA
Resest the FPGA by CAP9 software
VDDBU supply by 1V2
BMS tied to GND
Analog input 1 on CAP9 ADC channel 0
Analog input 2 on CAP9 ADC channel 1
Analog input 3 on CAP9 ADC channel 2
Analog input 4 on CAP9 ADC channel 3
FPGA TMS JTAG signal is FPGA JTAG port TMS signal.
FPGA TCK JTAG signal is FPGA JTAG port TCK signal.
FPGA JTAG TDI signal is FPGA JTAG port TDI signal.
The SPI DATA FLASH (U17) not selected
Measure VO3_PMC1 current of AT73C224 (U4) if a
charge is connected between TP24 and TP25
Measure VO4_PMC1 current of AT73C224 (U4) if a
charge is connected between TP26 and TP27
Measure VO3_PMC2 current of AT73C224 (U5) if a
charge is connected between TP28 and TP29
1V2_FPGA is off
1V8_FPGA is off
AT91CAP9-STK Starter Kit User Guide
Open
2-3

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