AT91CAP9A-STK Atmel, AT91CAP9A-STK Datasheet - Page 35

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AT91CAP9A-STK

Manufacturer Part Number
AT91CAP9A-STK
Description
KIT STARTER FOR AT91CAP9A
Manufacturer
Atmel
Series
CAP™r
Type
MCUr
Datasheets

Specifications of AT91CAP9A-STK

Contents
Board, CD
For Use With/related Products
AT91CAP9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6351B–CAP–27-Jun-08
Requirements
2.4.1.15 F15: Prototyping Area
2-28
In this case, the serial device is programmed via FPGA JTAG interface.
The advantage is that it makes it possible to configure the FPGA and program serial configuration
devices using the same JTAG interface. The disadvantage is that programming is very slow because
SFL needs to configure the FPGA before programming the serial configuration device.
In this case, the AT91CAP9 microcontroller drives the following signals via its PIO
Table 2-21. AT91CAP9 PIO Signal Control
To use this mode of programming, R216 to R219 0Ω resistors must be mounted and reset configu-
ration must be set to 2.
Once the serial configuration device is programmed, FPGA configuration is initiated at start-up between
FPGA and the serial configuration device via the DATA0, DCLK, nCSO and ASDO signals.
The FPGA AS mode configuration scheme is set by the MSEL[0..3] signals (default Fast AS).
Table 2-22. FPGA AS Mode Configuration
Two prototyping areas are implemented on the board.
Signal Name
nCE
nCSO
DCLK
ASDO_FPGA
Configuration Scheme
Fast AS (40 MHz)
Remote system upgrade fast AS (40 MHz)
AS (20 MHz)
Remote system upgrade AS (20 MHz)
Microcontroller programs serial configuration device
The first one is a 20x18 points, 1.24 mm-pitch matrix, with two 1x8 points, 1.24 mm-pitch line,
connected to 5V and 3.3V added on top of the matrix, and 1x20 points, 1.2 4 mm pitch line, connected
to GND added on the bottom of the matrix.
The second one is a 10x8 points, 2.54 mm-pitch matrix, with two 1x4points, 2.54 mm-pitch line,
connected to 5V and 3.3V added on top of the matrix, and 1x8 points, 2.54 mm-pitch line, connected
to GND added on the bottom of the matrix.
(See “F13: Reset Configuration” on page
Signal Description
Configuration Chip enable
Configuration Chip select
Configuration Clock pin
Configuration Read enable
MSEL3
1
1
1
1
MSEL2
0
0
1
1
2-26.)
AT91CAP9-STK Starter Kit User Guide
AT91CAP9 I/O
PB6
PB3
PB7
PB8
MSEL1
0
0
0
1
MSEL0
0
1
1
0

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