C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 144
C8051F020-TB
Manufacturer Part Number
C8051F020-TB
Description
BOARD PROTOTYPING W/C8051F020
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F020-TB
Contents
Board
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F020
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F020/1/2/3
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Bits7-3:
Bit2:
Bit1:
Bit0:
R/W
Bit7
-
UNUSED. Read = 00000b, Write = don't care.
SFLE: Scratchpad FLASH Memory Access Enable.
When this bit is set, FLASH reads and writes from user software are directed to the 128-byte Scratch-
pad FLASH sector. When SFLE is set to logic 1, FLASH accesses out of the address range 0x00-
0x7F should not be attempted. Reads/Writes out of this range will yield unpredictable results.
0: FLASH access from user software directed to the 64k byte Program/Data FLASH sector.
1: FLASH access from user software directed to the 128 byte Scratchpad sector.
PSEE: Program Store Erase Enable.
Setting this bit allows an entire page of the FLASH program memory to be erased provided the
PSWE bit is also set. After setting this bit, a write to FLASH memory using the MOVX instruction
will erase the entire page that contains the location addressed by the MOVX instruction. The value of
the data byte written does not matter.
0: FLASH program memory erasure disabled.
1: FLASH program memory erasure enabled.
PSWE: Program Store Write Enable.
Setting this bit allows writing a byte of data to the FLASH program memory using the MOVX
instruction. The location must be erased before writing data.
0: Write to FLASH program memory disabled.
1: Write to FLASH program memory enabled.
R/W
Bit6
-
Figure 15.4. PSCTL: Program Store Read/Write Control
R/W
Bit5
-
R/W
Bit4
-
Rev. 1.4
R/W
Bit3
-
SFLE
R/W
Bit2
PSEE
R/W
Bit1
PSWE
R/W
Bit0
SFR Address:
00000000
Reset Value
0x8F
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