C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 86
C8051F020-TB
Manufacturer Part Number
C8051F020-TB
Description
BOARD PROTOTYPING W/C8051F020
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F020-TB
Contents
Board
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F020
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F020/1/2/3
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Bit7:
Bits6-5:
Bits4-3:
Bits2-0:
DAC0EN
MSB
R/W
Bit7
MSB
DAC0EN: DAC0 Enable Bit.
0: DAC0 Disabled. DAC0 Output pin is disabled; DAC0 is in low-power shutdown mode.
1: DAC0 Enabled. DAC0 Output pin is active; DAC0 is operational.
UNUSED. Read = 00b; Write = don’t care.
DAC0MD1-0: DAC0 Mode Bits.
00: DAC output updates occur on a write to DAC0H.
01: DAC output updates occur on Timer 3 overflow.
10: DAC output updates occur on Timer 4 overflow.
11: DAC output updates occur on Timer 2 overflow.
DAC0DF2-0: DAC0 Data Format Bits:
000:
001:
010:
011:
1xx:
MSB
R/W
Bit6
-
The most significant nibble of the DAC0 Data Word is in DAC0H[3:0], while the least
significant byte is in DAC0L.
The most significant 5-bits of the DAC0 Data Word is in DAC0H[4:0], while the least
significant 7-bits are in DAC0L[7:1].
The most significant 6-bits of the DAC0 Data Word is in DAC0H[5:0], while the least
significant 6-bits are in DAC0L[7:2].
The most significant 7-bits of the DAC0 Data Word is in DAC0H[6:0], while the least
significant 5-bits are in DAC0L[7:3].
The most significant 8-bits of the DAC0 Data Word is in DAC0H[7:0], while the least
significant 4-bits are in DAC0L[7:4].
MSB
DAC0H
DAC0H
DAC0H
DAC0H
DAC0H
Figure 8.4. DAC0CN: DAC0 Control Register
R/W
Bit5
MSB
-
DAC0MD1 DAC0MD0 DAC0DF2 DAC0DF1 DAC0DF0 00000000
R/W
Bit4
Rev. 1.4
R/W
Bit3
R/W
Bit2
LSB
R/W
Bit1
DAC0L
DAC0L
DAC0L
DAC0L
DAC0L
LSB
R/W
Bit0
LSB
LSB
SFR Address:
Reset Value
0xD4
LSB
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