C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 192
C8051F020-TB
Manufacturer Part Number
C8051F020-TB
Description
BOARD PROTOTYPING W/C8051F020
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F020-TB
Contents
Board
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F020
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F020/1/2/3
18.4.2. Clock Rate Register
192
Bits7-0:
R/W
Bit7
SMB0CR.[7:0]: SMBus0 Clock Rate Preset
The SMB0CR Clock Rate register controls the frequency of the serial clock SCL in master mode. The
8-bit word stored in the SMB0CR Register preloads a dedicated 8-bit timer. The timer counts up, and
when it rolls over to 0x00, the SCL logic state toggles.
The SMB0CR setting should be bounded by the following equation , where SMB0CR is the unsigned
8-bit value in register SMB0CR, and SYSCLK is the system clock frequency in Hz:
The resulting SCL signal high and low times are given by the following equations:
Using the same value of SMB0CR from above, the Bus Free Timeout period is given in the following
equation:
R/W
Bit6
Figure 18.9. SMB0CR: SMBus0 Clock Rate Register
SMB0CR
T
R/W
Bit5
HIGH
T
T
BFT
LOW
258 SMB0CR
288
=
10
R/W
Bit4
256 SMB0CR
–
–
---------------------------------------------------- -
256 SMB0CR
0.85
–
Rev. 1.4
–
R/W
Bit3
SYSCLK
SYSCLK 1.125
SYSCLK
SYSCLK
R/W
Bit2
+
1
+
625ns
R/W
Bit1
R/W
Bit0
SFR Address:
00000000
Reset Value
0xCF
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