C8051F060-TB Silicon Laboratories Inc, C8051F060-TB Datasheet - Page 18
![BOARD PROTOTYPING W/C8051F060](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F060-TB
Manufacturer Part Number
C8051F060-TB
Description
BOARD PROTOTYPING W/C8051F060
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F060-TB
Contents
Board
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F060
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 18 of 328
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C8051F060/1/2/3/4/5/6/7
20. System Management BUS / I2C BUS (SMBUS0) ............................................... 235
21. Enhanced Serial Peripheral Interface (SPI0) ..................................................... 251
22. UART0 ................................................................................................................... 265
23. UART1 ................................................................................................................... 277
24. Timers ................................................................................................................... 287
25. Programmable Counter Array ............................................................................ 303
26. JTAG (IEEE 1149.1) ............................................................................................. 317
27. Document Change List ....................................................................................... 327
18
Table 19.1.CAN Register Index and Reset Values ............................................... 229
Table 20.1.SMB0STA Status Codes and States ................................................... 248
Table 21.1.SPI Slave Timing Parameters ............................................................. 264
Table 22.1.UART0 Modes ..................................................................................... 266
Table 22.2.Oscillator Frequencies for Standard Baud Rates ................................ 273
Table 23.1.Timer Settings for Standard Baud Rates Using the Internal Oscillator 284
Table 23.2.Timer Settings for Standard Baud Rates Using an External Oscillator 284
Table 23.3.Timer Settings for Standard Baud Rates Using an External Oscillator 285
Table 23.4.Timer Settings for Standard Baud Rates Using an External Oscillator 285
Table 23.5.Timer Settings for Standard Baud Rates Using an External Oscillator 286
Table 23.6.Timer Settings for Standard Baud Rates Using an External Oscillator 286
Table 25.1.PCA Timebase Input Options .............................................................. 304
Table 25.2.PCA0CPM Register Settings for PCA Capture/Compare Modules ..... 305
Table 26.1.Boundary Data Register Bit Definitions (C8051F060/2/4/6) ................ 318
Table 26.2.Boundary Data Register Bit Definitions (C8051F061/3/5/7) ................ 320
Rev. 1.2
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