C8051F060-TB Silicon Laboratories Inc, C8051F060-TB Datasheet - Page 67

BOARD PROTOTYPING W/C8051F060

C8051F060-TB

Manufacturer Part Number
C8051F060-TB
Description
BOARD PROTOTYPING W/C8051F060
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F060-TB

Contents
Board
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F060
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
AINnG
The offset register value affects the offset at the analog input as follows:
The gain register value affects the slope of the ADC transfer function as follows:
AINn
Offset Register (14 Bits)
Gain Register (13 Bits)
0x3FFF
0x1FFF
0x2000
0x0000
0x1000
0x0000
Figure 5.21. Offset and Gain Calibration Block Diagram
Offset Change
Figure 5.20. Offset and Gain Register Mapping
Slope Change
+
Offset
-
0x2000 Offset Register
----------------------------------------------------------- -
Gain Register 0x1000
-------------------------------------------------------- -
Approximate Offset Change (V)
Approximate Slope Change
Rev. 1.2
8192
ADCn
VREF
+3.125% * VREF
-3.125% * VREF
4096
+
C8051F060/1/2/3/4/5/6/7
+3.125%
-3.125%
0
0
Gain
3.125% VREF
3.125%
16
ADCn Data
67

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