C8051F060-TB Silicon Laboratories Inc, C8051F060-TB Datasheet - Page 220
![BOARD PROTOTYPING W/C8051F060](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F060-TB
Manufacturer Part Number
C8051F060-TB
Description
BOARD PROTOTYPING W/C8051F060
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F060-TB
Contents
Board
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F060
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F060/1/2/3/4/5/6/7
ing a logic 1 to the Weak Pull-up Disable bit, (WEAKPUD, XBR2.7). The weak pull-up is automatically
deactivated on any pin that is driving a logic 0; that is, an output pin will not contend with its own pull-up
device.
18.2.5. External Memory Interface
If the External Memory Interface is enabled on the High ports and an off-chip MOVX operation occurs, the
External Memory Interface will control the output states of the affected Port pins during the execution
phase of the MOVX instruction, regardless of the settings of the Port Data registers. The output configura-
tion of the Port pins is not affected by the EMIF operation, except that Read operations will explicitly dis-
able the output drivers on the Data Bus during the MOVX execution. See
Section “17. External Data
Memory Interface and On-Chip XRAM” on page 187
for more information about the External Memory Inter-
face.
220
Rev. 1.2
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