HW-V5-ML550-UNI-G Xilinx Inc, HW-V5-ML550-UNI-G Datasheet - Page 40

• Manufacturer Part Number: HW-V5-ML550-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr
• Type: FPGAr

Specifications of HW-V5-ML550-UNI-G

• Contents: Development Platform, Power Supply, Loopback Board, CompactFlash Card, software and documentation
• Silicon Manufacturer: Xilinx
• Features: 64M X 8 DDR SDRAM Memory, Six Samtec LVDS Connectors
• Kit Contents: Board, Cable, PSU, CD, Docs
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VLX50T-FFG1136
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Virtex™-5 LXT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Chapter 3: Hardware Description
40
30,U9.T18
30,U9.V18
VCC2V5_VAUX
19,U11.4
30,J19.8
30,J19.7
HZ0805E601R-00
1
SM_AVDD
REF_2V5_OUT
SM_VREF_P
Figure 3-19: System Monitor 2.5V Reference Selection using P39 (Sheet 19)
L2
2.5V V
2
The signal conditioning network is shown in
P39 is a 3-pin male right-angle header with pins on 0.1-inch centers. The right-angle pins
face Samtec connector P73. Depending on the length of the P39 pins, it could be difficult to
install/remove the 2-pin jumper block used to select the SM_AVDD voltage on the P39.2
center pin.
To alleviate any mechanical interference between the 2-pin jumper block and the body of
P73, P39 pins can be clipped shorter or bent slightly upwards to permit the 2-pin jumper
block to pass above the body of P73.
P39 must be a right-angle header to keep its profile beneath the LVDS Loopback board
whenever it is installed across the Samtec LVDS connectors.
System Monitor users should install the 2-pin shunt across P39 pins 1 - 2 to select the
precision 2.5V U10 REF3025 output (see
Table 3-14: System Monitor 2.5V AVDD Reference Options
P39
REF
HZ0805E601R-00
HDR_1X3_RA
1
P39 Pins
1 - 2
2 - 3
System Monitor
3
L1
2
0.1µF
1
C94
2
1
2
U10 TI REF3025 precision 2.5V reference
Filtered 2.5V V
C91
1µF
1
2
www.xilinx.com
1
2
A
VCC5
AUX
TI_REF3025_LF
3
C92
0.1µF
AGND
SOT23-3
HZ0805E601R-00
FPGA power plane
U10
1
Selected Reference Voltage
Table
OUT
IN
L4
A
Figure
3-14).
2
1
2
3-19.
ML550 Networking Interfaces Platform
1
2
VCC5_SYSMON_TAP
MAX6043 not
available in LF/RoHS
C99
1µF
UG202 (v1.4) April 18, 2008
UG202_3_19_041508
19,R282.2
19,C305.1
R