ATAVRONEKIT Atmel, ATAVRONEKIT Datasheet - Page 11

• Manufacturer Part Number: ATAVRONEKIT
• Description: KIT AVR/AVR32 DEBUGGER/PROGRMMR
• Manufacturer: Atmel
• Series: AVR®r
• Type: Debuggerr

Specifications of ATAVRONEKIT

• Contents: Programmer/Debugger
• Processor To Be Evaluated: AVR32
• Data Bus Width: 32 bit
• Interface Type: ISP, JTAG
• Core Architecture: AVR
• Kit Contents: ATAVRONEKIT
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Development Tool Type: Hardware / Software - Dev Kit (Dev Tool)
• Rohs Compliant: Yes
• Mcu Supported Families: AVR32 32-bit MCU
• For Use With/related Products: AVR® Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3
7.4
Figure 7-2.
8067M–AVR–09/10
Byte Address
In-System Programmable Flash Program Memory
Data Memory
17FF
1000
FFF
Data Memory Map (Hexadecimal address)
0
ATxmega192A1
I/O Registers
RESERVED
EEPROM
(4 KB)
(2 KB)
The XMEGA A1 devices contain On-chip In-System Programmable Flash memory for program
storage, see
Flash address location is 16 bits.
The Program Flash memory space is divided into Application and Boot sections. Both sections
have dedicated Lock Bits for setting restrictions on write or read/write operations. The Store Pro-
gram Memory (SPM) instruction must reside in the Boot Section when used to write to the Flash
memory.
A third section inside the Application section is referred to as the Application Table section which
has separate Lock bits for storage of write or read/write protection. The Application Table sec-
tion can be used for storing non-volatile data or application software.
Figure 7-1.
The Application Table Section and Boot Section can also be used for general application
software.
The Data Memory consists of the I/O Memory, EEPROM and SRAM memories, all within one
linear address space, see
all devices in the family is identical and with empty, reserved memory space for smaller devices.
2EFFF
2FFFF
30FFF
2F000
30000
/
/
/
/
/
Figure 7-1 on page
Flash Program Memory (Hexadecimal address)
1EFFF
1FFFF
20FFF
1F000
20000
Byte Address
Word Address
/
/
/
/
/
Figure 7-2 on page
17FF
1000
FFF
16FFF
17FFF
18FFF
17000
18000
0
11. Since all AVR instructions are 16- or 32-bits wide, each
ATxmega128A1
/
/
/
/
/
I/O Registers
RESERVED
EEPROM
10FFF
(4 KB)
(2 KB)
10000
EFFF
FFFF
F000
11. To simplify development, the memory map for
/
/
/
/
/
7FFF
77FF
87FF
7800
8000
0
Byte Address
Application Table Section (Bytes)
(384K/256K/192K/128K/64K)
Application Section (Bytes)
Boot Section (Bytes)
(8K/8K/8K/8K/4K)
(8K/8K/8K/8K/4K)
17FF
1000
FFF
0
XMEGA A1
...
ATxmega64A1
I/O Registers
RESERVED
EEPROM
(4 KB)
(2 KB)
11