M30850T2-CPE Renesas Electronics America, M30850T2-CPE Datasheet - Page 71

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M30850T2-CPE

Manufacturer Part Number
M30850T2-CPE
Description
DEV M32C/80/84/85/86 COMPACT EMU
Manufacturer
Renesas Electronics America
Type
In Circuit Debuggerr
Datasheet

Specifications of M30850T2-CPE

Contents
Compact Emulator, IDE, Assembler and Linker
For Use With/related Products
M32C/84,85,86
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
M30850T2-CPE User’s Manual
2. Trace window (bus display)
REJ10J0865-0300 Rev.3.00 December 16, 2005
Disassemble display
Source display
Bus display
Explanation of the trace window (bus
display)
The following explains the displayed contents, from left to
right.
- Address
- Data
- BUS
- BHE
- BIU
- R/W
- RWT
- CPU
- OPC
- OPR
Shows the status of the address bus.
Shows the status of the data bus.
Shows the width of the external data bus. In the present
emulator, only “16b” for 16 bits wide bus is displayed.
Shows the status (0 or 1) of the BHE (Byte High Enable)
signal. If this signal = 0, the odd-address data is valid.
Shows the status between the BIU (Bus Interface Unit)
and memory or I/O.
Symbol Status
WAIT
RBML : Read (bytes) ML on
F
QC
RWML : Read (words) ML on
INT
RB
WB
DRB
DWB
RW
WW
DRW
DWW
Shows the status of the data bus.
Displayed as “R” for Read, “W” for Write, and “–” for
no access.
This is the signal to indicate a valid bus cycle. When
valid, RWT = 0. The Address, Data, and the BIU signals
are effective when this signal is 0.
Shows the status between the CPU and BIU (Bus
Interface Unit).
Shows the op-code size in the read data.
Shows the code size except op-code.
: No change
: Executing the wait instruction
: Fetch
: Discontinuous fetch
: Interrupt acknowledge cycle
: Read (bytes)
: Write (bytes)
: Read (bytes) by DMA
: Write (bytes) by DMA
: Read (words)
: Write (words)
: Read (words) by DMA
: Write (words) by DMA
3. Usage (Emulator Debugger)
Page 69 of 98

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