HS7750KCI01H Renesas Electronics America, HS7750KCI01H Datasheet - Page 14

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HS7750KCI01H

Manufacturer Part Number
HS7750KCI01H
Description
ON CHIP DEBUG EMULATOR
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7750KCI01H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3. Low-Power States (Sleep, Standby, and Module Standby)
Note: After the sleep mode is cleared by a break, execution restarts at the instruction following
4. Reset Signals
Note: Do not start user program execution when the /RESET, /BREQ, or /RDY signal is being
5. Direct Memory Access Controller (DMAC)
6. Memory Access during User Program Execution
6
For low-power consumption, the SH7750 and SH7750S have sleep, standby, and module
standby modes.
The sleep and standby modes are switched using the SLEEP instruction. When the emulator is
used, the sleep mode can be cleared by either normal clearing or by the satisfaction of a break
condition (including BREAK key input). In the latter case, the user program breaks. The
standby mode can be cleared with the normal clearing function or BREAK key input, and after
the standby mode is cleared, the user program operates correctly. Note, however, that if a
command has been entered in standby mode or module standby mode, no commands can be
used from the emulator after the standby mode is cleared.
The SH7750 and SH7750S reset signals are only valid during emulation started with clicking
the GO or STEP-type button. If these signals are enabled on the user system in command
input wait state, they are not sent to the SH7750 or SH7750S.
The DMAC operates even when the emulator is used. When a data transfer request is
generated, the DMAC executes DMA transfer.
When a memory is accessed from the memory window, etc. during user program execution,
the user program is resumed after it has stopped in the E10A emulator to access the memory.
Therefore, realtime emulation cannot be performed.
The stopping time of the user program is as follows:
Environment:
the SLEEP instruction.
If the memory is accessed or modified in sleep mode, the sleep mode is cleared and
execution starts at the instruction following the SLEEP instruction.
Although the SH7750S supports the hardware standby function, if the SH7750 E10A
emulator enters the hardware standby mode, a TIMEOUT error will occur.
When the SLEEP instruction is executed by a step command and [Step…] in the [Run]
menu is used, set [Rate] as 6. If 5 or lower value is set, a communication timeout error will
occur.
low. A TIMEOUT error will occur.
Host computer: 1 GHz (Pentium
OS: Windows
SH7750: 50 MHz (CPU clock)
JTAG clock: 15 MHz
®
2000
®
III)

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