PIC16F677-I/ML Microchip Technology, PIC16F677-I/ML Datasheet - Page 251

• Manufacturer Part Number: PIC16F677-I/ML
• Description: IC PIC MCU FLASH 2KX14 20QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F677-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Mfg Application Notes: Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINDVA1004 - DEVICE ADAPTER 8/14/20DIP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 17-12: SPI MODE REQUIREMENTS
FIGURE 17-16:
© 2007 Microchip Technology Inc.
Param
No.
70*
71*
72*
73*
74*
75*
76*
77*
78*
79*
80*
81*
82*
83*
SCL
SDA
Note: Refer to Figure 17-3 for load conditions.
*
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SS
SC
SC
DI
DI
DO
DO
DO
DO
Symbol
These parameters are characterized but not tested.
only and are not tested.
V2
V2
L2
L2
H2
L2
H
L
H2
L2
R
F
H2
L2
H2
L2
R
F
V2
V2
SC
SC
SC
SC
DI
DO
DO
SS
DO
DI
DO
SS
SC
SC
L
H,
L
L,
H,
L
H
V
V
H,
Z
V,
H,
L
90
SS↓ to SCK↓ or SCK↑ input
SCK input high time (Slave mode)
SCK input low time (Slave mode)
Setup time of SDI data input to SCK edge
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS↑ to SDO output high-impedance
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid after
SCK edge
SDO data output setup to SCK edge
SDO data output valid after SS↓ edge
SS ↑ after SCK edge
I
2
Condition
C™ BUS START/STOP BITS TIMING
Start
91
PIC16F631/677/685/687/689/690
Characteristic
3.0-5.5V
2.0-5.5V
3.0-5.5V
2.0-5.5V
3.0-5.5V
2.0-5.5V
1.5T
T
T
CY
CY
Min
T
100
100
Tcy
CY
10
—
—
—
—
—
—
—
—
—
CY
+ 20
+ 20
+ 40
Typ†
10
25
10
10
25
10
—
—
—
—
—
—
—
—
—
—
—
92
Condition
Max Units Conditions
Stop
145
25
50
25
50
25
50
25
50
50
—
—
—
—
—
—
—
93
DS41262D-page 249
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns