PIC16F677-I/ML Microchip Technology, PIC16F677-I/ML Datasheet - Page 37

• Manufacturer Part Number: PIC16F677-I/ML
• Description: IC PIC MCU FLASH 2KX14 20QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F677-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Mfg Application Notes: Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINDVA1004 - DEVICE ADAPTER 8/14/20DIP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 2-4:
© 2007 Microchip Technology Inc.
Bank 3
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
Legend:
Note
Addr
1:
2:
INDF
OPTION_REG
PCL
STATUS
FSR
TRISA
TRISB
TRISC
PCLATH
INTCON
EECON1
EECON2
PSTRCON
SRCON
Name
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
MCLR and WDT Reset does not affect the previous value data latch. The RABIF bit will be cleared upon Reset but will set again if the
mismatch exists.
PIC16F685/PIC16F690 only.
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(2)
PIC16F631/677/685/687/689/690 SPECIAL FUNCTION REGISTERS SUMMARY BANK 3
Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
EEPGD
EEPROM Control Register 2 (not a physical register)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
TRISB7
TRISC7
RABPU
Bit 7
SR1
IRP
GIE
—
—
—
(2)
INTEDG
TRISC6
TRISB6
Bit 6
PEIE
RP1
SR0
—
—
—
—
PIC16F631/677/685/687/689/690
TRISA5
TRISB5
TRISC5
C1SEN
T0CS
Bit 5
T0IE
RP0
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
STRSYNC
TRISA4
TRISB4
TRISC4
C2REN
T0SE
INTE
Bit 4
TO
—
WRERR
TRISA3
TRISC3
PULSS
RABIE
STRD
Bit 3
PSA
PD
—
TRISC2
TRISA2
PULSR
WREN
STRC
Bit 2
T0IF
PS2
—
Z
TRISA1
TRISC1
STRB
Bit 1
INTF
PS1
WR
DC
—
—
RABIF
TRISC0
TRISA0
STRA
Bit 0
PS0
RD
—
—
C
(1)
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
--11 1111
1111 ----
1111 1111
---0 0000
0000 000x
x--- x000
---- ----
---0 0001
0000 00--
POR, BOR
Value on
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DS41262D-page 35
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44,201
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36,201
44,201
59,201
70,202
76,202
44,201
38,201
Page
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