PIC18LF13K22-I/P Microchip Technology, PIC18LF13K22-I/P Datasheet - Page 377

• Manufacturer Part Number: PIC18LF13K22-I/P
• Description: IC PIC MCU FLASH 256KX8 20-PDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-I/P

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Device Overview ................................................................... 9
Device Reset Timers......................................................... 253
DEVID1 Register............................................................... 270
DEVID2 Register............................................................... 270
Direct Addressing................................................................ 44
E
ECCPAS Register ............................................................. 125
EECON1 Register ......................................................... 51, 60
Effect on Standard PIC Instructions .................................. 324
Electrical Specifications .................................................... 331
Enhanced Capture/Compare/PWM (ECCP) ..................... 113
Enhanced Universal Synchronous Asynchronous
Errata .................................................................................... 7
EUSART ........................................................................... 179
 2010 Microchip Technology Inc.
Details on Individual Family Members ........................ 10
Features (28-Pin Devices) .......................................... 11
New Core Features....................................................... 9
Other Special Features ............................................... 10
Oscillator Start-up Timer (OST) ................................ 253
PLL Lock Time-out.................................................... 253
Power-up Timer (PWRT) .......................................... 253
Time-out Sequence................................................... 253
Associated Registers ................................................ 133
Enhanced PWM Mode .............................................. 117
Outputs and Configuration ........................................ 114
Specifications............................................................ 356
Receiver Transmitter (EUSART)............................... 179
Asynchronous Mode ................................................. 181
Baud Rate Generator (BRG)
Clock polarity
Data polarity
Interrupts
Auto-Restart...................................................... 127
Auto-shutdown .................................................. 125
Direction Change in Full-Bridge Output Mode .. 123
Full-Bridge Application ...................................... 121
Full-Bridge Mode .............................................. 121
Half-Bridge Application ..................................... 120
Half-Bridge Application Examples .................... 128
Half-Bridge Mode .............................................. 120
Output Relationships (Active-High and
Output Relationships Diagram .......................... 119
Programmable Dead Band Delay ..................... 128
Shoot-through Current ...................................... 128
Start-up Considerations .................................... 124
12-bit Break Transmit and Receive .................. 198
Associated Registers, Receive ......................... 187
Associated Registers, Transmit ........................ 183
Auto-Wake-up on Break ................................... 196
Baud Rate Generator (BRG) ............................ 191
Clock Accuracy ................................................. 188
Receiver............................................................ 184
Setting up 9-bit Mode with Address Detect....... 186
Transmitter........................................................ 181
Associated Registers ........................................ 191
Auto Baud Rate Detect ..................................... 195
Baud Rate Error, Calculating ............................ 191
Baud Rates, Asynchronous Modes .................. 192
Formulas ........................................................... 191
High Baud Rate Select (BRGH Bit) .................. 191
Synchronous Mode ........................................... 199
Asynchronous Receive ..................................... 184
Asynchronous Transmit .................................... 181
Synchronous Mode ........................................... 199
Active-Low) ............................................... 118
Preliminary
PIC18F1XK22/LF1XK22
Extended Instruction Set
F
Fail-Safe Clock Monitor .............................................. 25, 261
Fast Register Stack ............................................................ 30
Firmware Instructions ....................................................... 277
Flash Program Memory ...................................................... 49
G
General Call Address Support .......................................... 160
GOTO ............................................................................... 298
H
Hardware Multiplier............................................................. 63
I
I/O Ports ............................................................................. 79
I
2
C
Synchronous Master Mode............................... 199, 204
Synchronous Slave Mode
ADDFSR................................................................... 320
ADDULNK ................................................................ 320
and Using MPLAB Tools .......................................... 326
CALLW ..................................................................... 321
Considerations for Use ............................................. 324
MOVSF..................................................................... 321
MOVSS..................................................................... 322
PUSHL...................................................................... 322
SUBFSR ................................................................... 323
SUBULNK................................................................. 323
Syntax....................................................................... 319
Fail-Safe Condition Clearing....................................... 25
Fail-Safe Detection ..................................................... 25
Fail-Safe Operation .................................................... 25
Reset or Wake-up from Sleep .................................... 25
Associated Registers.................................................. 58
Control Registers........................................................ 50
Erase Sequence ......................................................... 55
Erasing ....................................................................... 55
Operation During Code-Protect .................................. 58
Reading ...................................................................... 54
Table Pointer
Table Pointer Boundaries ........................................... 52
Table Reads and Table Writes ................................... 49
Write Sequence .......................................................... 56
Writing To ................................................................... 56
Introduction................................................................. 63
Operation.................................................................... 63
Performance Comparison........................................... 63
Associated Registers................................................ 177
Asynchronous Receive..................................... 185
Asynchronous Transmit.................................... 181
Associated Registers, Receive......................... 203
Associated Registers, Transmit................ 201, 204
Reception ......................................................... 201
Transmission .................................................... 199
Associated Registers, Receive......................... 205
Reception ......................................................... 205
Transmission .................................................... 204
EECON1 and EECON2 ...................................... 50
TABLAT (Table Latch) Register ......................... 52
TBLPTR (Table Pointer) Register....................... 52
Boundaries Based on Operation ........................ 53
Protection Against Spurious Writes .................... 58
Unexpected Termination .................................... 58
Write Verify ......................................................... 58
DS41365D-page 377