PIC24HJ64GP206-I/PT Microchip Technology, PIC24HJ64GP206-I/PT Datasheet - Page 178

• Manufacturer Part Number: PIC24HJ64GP206-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP206-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 13
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 18 Channel
• Controller Family/series: PIC24
• No. Of I/o's: 53
• Ram Memory Size: 8KB
• Cpu Speed: 40MIPS
• No. Of Timers: 13
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24HJXXXGPX06/X08/X10
18.5.7
Transmit interrupts can be divided into 2 major groups,
each including various conditions that generate
interrupts:
• Transmit Interrupt:
• Transmit Error Interrupts:
FIGURE 18-2:
DS70175F-page 176
T
- Transmitter Warning Interrupt:
- Transmitter Error Passive:
- Bus Off:
Note:
At least one of the three transmit buffers is empty
(not scheduled) and can be loaded to schedule a
message for transmission. Reading the TXnIF
flags will indicate which transmit buffer is available
and caused the interrupt.
A transmission error interrupt will be indicated by
the ERRIF flag. This flag shows that an error con-
dition occurred. The source of the error can be
determined by checking the error flags in the CAN
Interrupt Flag register, CiINTF. The flags in this
register are related to receive and transmit errors.
Input Signal
Q
The TXWAR bit indicates that the transmit error
counter has reached the CPU warning limit
of 96.
The TXEP bit (CiINTF<12>) indicates that the
transmit error counter has exceeded the error
passive limit of 127 and the module has gone to
error passive state.
The TXBO bit (CiINTF<13>) indicates that the
transmit error counter has exceeded 255 and
the module has gone to the bus off state.
TRANSMIT INTERRUPTS
Both ECAN1 and ECAN2 can trigger a
DMA data transfer. If C1TX, C1RX, C2TX
or C2RX is selected as a DMA IRQ
source, a DMA transfer occurs when the
C1TXIF, C1RXIF, C2TXIF or C2RXIF bit
gets set as a result of an ECAN1 or
ECAN2 transmission or reception.
Sync
ECAN™ MODULE BIT TIMING
Segment
Prop
Segment 1
Phase
Sample Point
18.6
All nodes on any particular CAN bus must have the
same nominal bit rate. In order to set the baud rate, the
following parameters have to be initialized:
• Synchronization Jump Width
• Baud Rate Prescaler
• Phase Segments
• Length Determination of Phase Segment 2
• Sample Point
• Propagation Segment bits
18.6.1
All controllers on the CAN bus must have the same
baud rate and bit length. However, different controllers
are not required to have the same master oscillator
clock. At different clock frequencies of the individual
controllers, the baud rate has to be adjusted by
adjusting the number of time quanta in each segment.
The nominal bit time can be thought of as being divided
into separate non-overlapping time segments. These
segments are shown in Figure 18-2.
• Synchronization Segment (Sync Seg)
• Propagation Time Segment (Prop Seg)
• Phase Segment 1 (Phase1 Seg)
• Phase Segment 2 (Phase2 Seg)
The time segments and also the nominal bit time are
made up of integer units of time called time quanta or
T
of 8 T
the minimum nominal bit time is 1 μsec corresponding
to a maximum bit rate of 1 MHz.
Q
. By definition, the nominal bit time has a minimum
Q
and a maximum of 25 T
Baud Rate Setting
BIT TIMING
Segment 2
Phase
© 2007 Microchip Technology Inc.
Q
. Also, by definition,
Sync