PIC24HJ64GP206-I/PT Microchip Technology, PIC24HJ64GP206-I/PT Datasheet - Page 222

IC PIC MCU FLASH 32KX16 64TQFP

PIC24HJ64GP206-I/PT

Manufacturer Part Number
PIC24HJ64GP206-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP206-I/PT

Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
13
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 18 Channel
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
13
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Height
1 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC24HJXXXGPX06/X08/X10
20.2
All of the PIC24HJXXXGPX06/X08/X10 devices power
their core digital logic at a nominal 2.5V. This may cre-
ate an issue for designs that are required to operate at
a higher typical voltage, such as 3.3V. To simplify sys-
tem
PIC24HJXXXGPX06/X08/X10 family incorporate an
on-chip regulator that allows the device to run its core
logic from V
The regulator provides power to the core from the other
V
than 5 ohms) capacitor (such as tantalum or ceramic)
be connected to the V
This helps to maintain the stability of the regulator. The
recommended value for the filter capacitor is provided
in TABLE 23-13: “Internal Voltage Regulator Speci-
fications” located in Section 23.1 “DC Characteris-
tics”.
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 20-1:
DS70175F-page 220
DD
Note 1:
pins. The regulator requires that a low-ESR (less
On-Chip Voltage Regulator
10
design,
,
STARTUP
it takes approximately 20 μs for the on-chip
μF
DD
These are typical operating voltages. Refer
to TABLE 23-13: “Internal Voltage Regu-
lator Specifications” located in
Section 23.1 “DC Characteristics” for the
full operating ranges of V
.
3.3V
is applied every time the device
all
DDCORE
ON-CHIP VOLTAGE
REGULATOR
CONNECTIONS
V
V
V
DD
DDCORE
SS
PIC24H
STARTUP
/V
devices
/V
CAP
CAP
, code execution is
DD
pin (Figure 20-1).
(1)
and V
DDCORE
in
.
the
20.3
The BOR (Brown-out Reset) module is based on an
internal voltage reference circuit that monitors the reg-
ulated voltage V
module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (i.e.,
missing portions of the AC cycle waveform due to bad
power transmission lines or voltage sags due to exces
ive current draw when a large inductive load is turned
on).
A BOR will generate a Reset pulse which will reset the
device. The BOR will select the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>). Furthermore, if an oscillator mode is
selected, the BOR will activate the Oscillator Start-up
Timer (OST). The system clock is held until OST
expires. If the PLL is used, then the clock will be held
until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) will be
applied before the internal Reset is released. If TPWRT
= 0 and a crystal oscillator is being used, then a nomi-
nal delay of TFSCM = 100 ìs is applied. The total delay
in this case is TFSCM.
The BOR Status bit (RCON<1>) will be set to indicate
that a BOR has occurred. The BOR circuit, if enabled,
continues to operate while in Sleep or Idle modes and
will reset the device should VDD fall below the BOR
threshold voltage.
BOR: Brown-Out Reset
DDCORE
. The main purpose of the BOR
© 2007 Microchip Technology Inc.

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