PIC24HJ64GP502-I/MM Microchip Technology, PIC24HJ64GP502-I/MM Datasheet - Page 159

• Manufacturer Part Number: PIC24HJ64GP502-I/MM
• Description: IC PIC MCU FLASH 64K 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP502-I/MM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel / 12 bit, 10 Channel
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 4KB
• Cpu Speed: 40MIPS
• No. Of Timers: 7
• Embedded Interface Type: CAN, I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.0
The Timer1 module is a 16-bit timer, which can serve
as the time counter for the real-time clock, or operate
as a free-running interval timer/counter.
The Timer1 module has the following unique features
over other timers:
• Can be operated from the low power 32 kHz
• Can be operated in Asynchronous Counter mode
• The external clock input (T1CK) can optionally be
FIGURE 12-1:
© 2011 Microchip Technology Inc.
crystal oscillator available on the device
from an external clock source.
synchronized to the internal device clock and the
clock synchronization is performed after the
prescaler.
Note 1: This data sheet summarizes the features
SOSCO/
SOSCI
T1CK
Note 1: Refer to
2: Some registers and associated bits
TIMER1
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
of
PIC24HJ64GPX02/X04
PIC24HJ128GPX02/X04
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 11. “Timers”
(DS70205) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip website
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
the
LPOSCEN
Section 9.0 “Oscillator Configuration”
16-BIT TIMER1 MODULE BLOCK DIAGRAM
PIC24HJ32GP302/304,
(1)
F
TCKPS<1:0>
Prescaler
CY
(/n)
TCKPS<1:0>
Prescaler
families
Sync
Gate
(/n)
and
Sync
of
in
TSYNC
Falling Edge
for information on enabling the secondary oscillator.
Detect
0
1
TGATE
The unique features of Timer1 allow it to be used for
Real Time Clock (RTC) applications. A block diagram
of Timer1 is shown in
The Timer1 module can operate in one of the following
modes:
• Timer mode
• Gated Timer mode
• Synchronous Counter mode
• Asynchronous Counter mode
In Timer and Gated Timer modes, the input clock is
derived from the internal instruction cycle clock (F
In Synchronous and Asynchronous Counter modes,
the input clock is derived from the external clock input
at the T1CK pin.
The Timer modes are determined by the following bits:
• Timer Clock Source Control bit (TCS): T1CON<1>
• Timer Synchronization Control bit (TSYNC):
• Timer Gate Control bit (TGATE): T1CON<6>
Timer control bit setting for different operating modes
are given in the
TABLE 12-1:
Timer
Gated timer
Synchronous
counter
Asynchronous
counter
TCS
T1CON<2>
Mode
10
00
x1
Comparator
Table
TIMER MODE SETTINGS
TMR1
PR1
TCS
Figure
12-1.
0
0
1
1
Reset
Equal
12-1.
TGATE
TGATE
0
1
x
x
DS70293E-page 159
1
0
Set T1IF flag
TSYNC
x
x
1
0
CY
).