PIC24HJ64GP502-I/MM Microchip Technology, PIC24HJ64GP502-I/MM Datasheet - Page 28

IC PIC MCU FLASH 64K 28-QFN

PIC24HJ64GP502-I/MM

Manufacturer Part Number
PIC24HJ64GP502-I/MM
Description
IC PIC MCU FLASH 64K 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP502-I/MM

Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel / 12 bit, 10 Channel
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
4KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
4.2.5
The PIC24HJ32GP302/304 devices contain 1 Kbytes
of dual ported DMA RAM located at the end of X data
space.
PIC24HJ128GPX02/X04 devices contain 2 Kbytes of
dual ported DMA RAM located at the end of X data
space, and is a part of X data space. Memory
locations in the DMA RAM space are accessible
simultaneously by the CPU and the DMA controller
module. DMA RAM is utilized by the DMA controller to
store data to be transferred to various peripherals
using DMA, as well as data transferred from various
peripherals using DMA. The DMA RAM can be
accessed by the DMA controller without having to
steal cycles from the CPU.
FIGURE 4-3:
DS70293E-page 28
DMA RAM
The
2 Kbyte
SFR Space
4 Kbyte
SRAM Space
Optionally
Mapped
into Program
Memory
PIC24HJ64GPX02/X04
DATA MEMORY MAP FOR PIC24HJ32GP302/304 DEVICES WITH 4 KB RAM
Address
0xFFFF
0x0000
0x07FF
0x0801
0x17FF
0x1801
0x13FF
0x1401
0x8001
MSb
and
MSb
Unimplemented (X)
X Data RAM (X)
SFR Space
DMA RAM
X Data
16 bits
When the CPU and the DMA controller attempt to
concurrently write to the same DMA RAM location, the
hardware ensures that the CPU is given precedence in
accessing the DMA RAM location. Therefore, the DMA
RAM provides a reliable means of transferring DMA
data without ever having to stall the CPU.
Note:
LSb
DMA RAM can be used for general
purpose data storage if the DMA function
is not required in an application.
Address
0x8000
0x07FE
0x0800
0x0000
0x13FE
0x1400
0x17FE
0x1800
0xFFFE
© 2011 Microchip Technology Inc.
LSb
6 Kbyte
Near
Data
Space

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